PROCESSOR-SDK-J722S: TIDL run ort_main and tfl_main fail on J722S

Tool/software:

Hi team,

  I follow https://github.com/TexasInstruments/edgeai-tidl-tools SOP and try to run on J722s chip,

My Image version is 10.00.00.08 / TIDL version is 10.00.04.00,

after I compiler on J722s with command : cmake –DTARGE_CPU=arm ../examples and make -j 

I try to run on chip by command : 

• ./bin/Release/ort_main -f model_zoo/ONR-OD-8200-yolox-nano-lite-mmdet-coco-416x416 -i test_data/airshow.jpg -v 1
• ./bin/Release/tfl_main -f "cl-0000_tflitert_mlperf_mobilenet_v1_1.0_224_tflite/" -i test_data/airshow.jpg -v 1

model_zoo is copy by SDK10.00.00.08 image 's "/opt/model_zoo"

cl-0000_tflitert_mlperf_mobilenet_v1_1.0_224_tflite/ is download by

but I get error message below:

(ONR)                                                                                      (TFL)

onnx failed:Protobuf parsing failed.                                          TIDL_RT_OVX: ERROR: Config file size (37256 bytes) does not match size of sTIDL_IOBufDesc_t (189208 bytes)

Please help me to check this symptom, if I miss some step or command is wrong,

Thanks for your kindly help.