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[FAQ] AM625 / AM623 / AM620-Q1 / AM625-Q1 / AM625SIP: Is the eMMC clocks maintained when read and write operations are finished ?

Part Number: AM625

Tool/software:

Hi,

I would like to know if the AM6352 continuously maintains the eMMC clock or if it stops it when it finishes the read and write processes.

Why asking ? 
In most eMMC the “patrol” that refreshes and monitors the health of the memory works when it has the clock running.

Regards

Geoffrey

  • I assume you had a typo in your question and were asking about AM6252.

    If so, I was able to confirm the MMCSD host controller implemented in AM62x devices has the capability to pause the clock when there are no transfers, but that function is turned off by default.

    Regards,
    Paul