SK-AM62A-LP: Specifying _c_int00_secure as the entry_point results in a runtime error.

O.H

Part Number: SK-AM62A-LP
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hi experts,

This is a continuation of the question below from the original thread.

Q: What is the correct procedure for setting this up in the c7x FreeRTOS environment?
Please let me know if there are any sample projects or user manuals.

A: The entry point for any FreeRTOS application running on C7x is set to "_c_int00_secure". This function sets up the TCR and MAIR for the C7x. Let me know if this helps answer the question.

The customer confirmed the operation of _c_int00_secure(), cache settings, and performance via sysconfig.
In the linker settings of the provided project, specifying _c_int00_secure as the entry_point seems to result in a runtime error (when executing the entry point during load).
The main difference between this and a working linker is the starting address of the user's address.

Q1:Could the following be affecting this?
AM62Ax_C7x.cmd: Starts at 0x80000000
linker.cmd: Starts at 0x99800000

Best regards,
O.H

2 months ago

0 Shreyansh Anand 2 months ago

TI__Expert 7190 points

Hi O.H,
Can you please share the linker script of the project which is giving runtime error?

Thanks,
Shreyansh

0 O.H 2 months ago in reply to Shreyansh Anand

Mastermind 6480 points

Hi Shreyansh,

Sorry for the late reply.

The problem occurs with the sample project's "linker.cmd." The problem doesn't occur with my customized "tmp2.cmd."

Fullscreen 6303.linker.cmd.txt Download

--ram_model
-heap  0x20000
-stack 0x20000
--args 0x1000
--diag_suppress=10068 /* to suppress no matching section error */
--cinit_compression=off
-e _c_int00_secure

#define DDR0_ALLOCATED_START  0x80000000
#define C7X_ALLOCATED_START DDR0_ALLOCATED_START + 0x19800000

#define C7X_RESOURCE_TABLE_BASE (C7X_ALLOCATED_START + 0x00100000)
#define C7X_BOOT_BASE           (C7X_ALLOCATED_START + 0x00200000)
#define C7X_VECTOR_BASE         (C7X_ALLOCATED_START + 0x00400000)
#define C7X_DDR_SPACE_BASE      (C7X_ALLOCATED_START + 0x00410000)

MEMORY
{
    L2SRAM (RWX):  org = 0x7E000000,          len = 0x00100000
    DDR0_RESERVED: org = 0x80000000,          len = 0x19800000   /*  Reserved for A53 OS */
    C7X_IPC_D:     org = C7X_ALLOCATED_START, len = 0x00100000   /*  1MB DDR */
    C7X_BOOT_D:    org = C7X_BOOT_BASE,       len = 0x400        /*  1024B DDR */
    C7X_VECS_D:    org = C7X_VECTOR_BASE,     len = 0x4000       /*  16KB DDR */
    C7X_CIO_MEM:   org = C7X_DDR_SPACE_BASE,  len = 0x1000       /*  4KB DDR */
    C7X_DDR_SPACE: org = C7X_DDR_SPACE_BASE+0x1000, len = 0x01BF0000-0x1000  /*  27.9MB - 4KB DDR  */
}

SECTIONS
{
    boot:
    {
      boot.*<boot.oe71>(.text)
    } load > C7X_BOOT_D ALIGN(0x200000)
    .vecs       >       C7X_VECS_D ALIGN(0x400000)
    .secure_vecs    >   C7X_DDR_SPACE ALIGN(0x200000)
    .text:_c_int00_secure > C7X_DDR_SPACE ALIGN(0x200000)
    .text       >       C7X_DDR_SPACE ALIGN(0x200000)

    .bss        >       C7X_DDR_SPACE  /* Zero-initialized data */
    RUN_START(__BSS_START)
    RUN_END(__BSS_END)

    .data       >       C7X_DDR_SPACE  /* Initialized data */

    .cinit      >       C7X_DDR_SPACE  /* could be part of const */
    .init_array >       C7X_DDR_SPACE  /* C++ initializations */
    .stack      >       C7X_DDR_SPACE ALIGN(0x2000)
    .args       >       C7X_DDR_SPACE
    .cio        >       C7X_CIO_MEM
    .const      >       C7X_DDR_SPACE
    .switch     >       C7X_DDR_SPACE /* For exception handling. */
    .sysmem     >       C7X_DDR_SPACE /* heap */

    GROUP:              >  C7X_DDR_SPACE
    {
        .data.Mmu_tableArray          : type=NOINIT
        .data.Mmu_tableArraySlot      : type=NOINIT
        .data.Mmu_level1Table         : type=NOINIT
        .data.gMmu_tableArray_NS       : type=NOINIT
        .data.Mmu_tableArraySlot_NS   : type=NOINIT
        .data.Mmu_level1Table_NS      : type=NOINIT
    }

    .benchmark_buffer:     > C7X_DDR_SPACE ALIGN (32)

}

Fullscreen 2318.tmp2.cmd.txt Download

-heap  0xF0000   // 756 kB
/* -stack 0x4000    //  16 kB */
-stack 0x20000    //  128 kB
--cinit_compression=off
--args 0x1000
--diag_suppress=10068 // "no matching section"
/* -e _c_int00_secure */

/* #define DDR0_ALLOCATED_START  0x80000000 */
/* #define C7X_ALLOCATED_START DDR0_ALLOCATED_START + 0x19800000 */
#define C7X_ALLOCATED_START 0x80000000

#define C7X_RESOURCE_TABLE_BASE (C7X_ALLOCATED_START + 0x00100000)
#define C7X_BOOT_BASE           (C7X_ALLOCATED_START + 0x00200000)
#define C7X_VECTOR_BASE         (C7X_ALLOCATED_START + 0x00400000)
#define C7X_DDR_SPACE_BASE      (C7X_ALLOCATED_START + 0x00410000)
#define C7X_DDR_NEAR_BASE       (C7X_ALLOCATED_START + 0x01F00000)
#define C7X_DDR_FAR_BASE        (C7X_ALLOCATED_START + 0x01F80000)
#define C7X_DDR_EXT_BASE        (C7X_ALLOCATED_START + 0x02000000)

MEMORY
{
  L2SRAM_CINIT (RWX)  : org = 0x7E000000, len = 0x000100 //for 256byte init
  L2SRAM (RWX)        : org = 0x7E000100, len = 0x0fff00 //for 1MBytes  EL2
  L2SRAMAUX   (RWX): org = 0x7F000000, len = 0x040000   // for 256 KBytes AM62A
  L1DSRAM  (RWX): org = 0x64E00000, len = 0x004000   // 16kB, for J7

  EXTMEM_STATIC   (RWX): org = 0x80000000, len = 0x200000
  EXTMEM_DATACN   (RWX): org = 0x80200000, len = 0x200000
  EXTMEM   (RWX): org = 0x80400000, len = 0x200000
  /* rem EXTMEM   (RWX): org = 0x80410000, len = 0x1F0000*/		/* 0702 実行エラー対策 */ 
  /* rem EXTMEM   (RWX): org = 0x80600000, len = 0x400000
   * rem EXTMEMPAGE (RWX): org = 0x80A00000, len = 0x200000 */

  EXTMEM_FXBUF (RWX):   org = 0x80600000,    len = 0x08000000			/* 128MB DDR */
}

SECTIONS
{
    boot:
    {
      boot.*<boot.oe71>(.text)
    } load > EXTMEM ALIGN(0x200000)
	.text:_c_int00 > 		L2SRAM_CINIT
	.text:_c_int00_secure > L2SRAM ALIGN(0x200000)
	.text     	>			EXTMEM  	  ALIGN(0x2000)
	.stack    	>			L2SRAM ALIGN(0x2000)
	.vecs		>			EXTMEM ALIGN(0x80000)
	.secure_vecs	>		EXTMEM ALIGN(0x200000)
	.bss 		>			EXTMEM_DATACN
    RUN_START(__BSS_START)
    RUN_END(__BSS_END)  
	.cio      	>			L2SRAM
	.const    	>			L2SRAM
	.data       >			EXTMEM
	.switch     >			EXTMEM
	.sysmem		>			EXTMEM
	.far		>			EXTMEM
	.args       >			EXTMEM
	.ppinfo		>			EXTMEM
	.ppdata		>			EXTMEM
	.pinit		>			L2SRAM
	.cinit     	>			EXTMEM
	.binit		>			EXTMEM
	.init_array >			EXTMEM
	.neardata	>			EXTMEM
	.fardata	>			EXTMEM
	.rodata		>			EXTMEM
	.c6xabi.exidx	>		EXTMEM
	.c6xabi.extab	>		EXTMEM
	.vectors	>			EXTMEM
	.version_data	>		EXTMEM
	.table		>			EXTMEM
	.sdram		>			EXTMEM_FXBUF
	.src_table		>		EXTMEM

    GROUP:              >  EXTMEM
    {
        .data.Mmu_tableArray          : type=NOINIT
        .data.Mmu_tableArraySlot      : type=NOINIT
        .data.Mmu_level1Table         : type=NOINIT
        .data.gMmu_tableArray_NS       : type=NOINIT
        .data.Mmu_tableArraySlot_NS   : type=NOINIT
        .data.Mmu_level1Table_NS      : type=NOINIT
    }

    .benchmark_buffer:     > EXTMEM ALIGN (32)

}

Best regrads,
O.H

0 Meet Thakar 2 months ago in reply to O.H

TI__Genius 13705 points

Hi O.H,

The concerned expert is out of office for the rest of this week, please expect some delay in response.

Best Regards,

Meet.

0 Shreyansh Anand 1 month ago in reply to Meet Thakar

TI__Expert 7190 points

Hi O.H,
Can you also share your memory regions added in the MMU(sysconfig)?

Are you running any specific example?

Thanks,
Shreyansh

0 O.H 1 month ago in reply to Shreyansh Anand

Mastermind 6480 points

Hi Shreyansh,

We apologize for the late reply.

Here are the details of the customer's problem.

Using AM62Ax_C7x.cmd (linker.cmd excludes from build) → Fails when entrypoint is _c_int00_secure
Using linker.cmd (AM62Ax_C7x.cmd excludes from build) → Passes when entrypoint is _c_int00_secure
The cmd file and the sysconfig file used in this case are also included.

Fullscreen AM62Ax_C7x.cmd.txt Download

-heap  0xF0000   // 756 kB
/* -stack 0x4000    //  16 kB */
-stack 0x20000    //  128 kB
--cinit_compression=off
--args 0x1000
--diag_suppress=10068 // "no matching section"
-e _c_int00_secure
/* -e _c_int00 */

/* #define DDR0_ALLOCATED_START  0x80000000 */
/* #define C7X_ALLOCATED_START DDR0_ALLOCATED_START + 0x19800000 */
#define C7X_ALLOCATED_START 0x80000000

#define C7X_RESOURCE_TABLE_BASE (C7X_ALLOCATED_START + 0x00100000)
#define C7X_BOOT_BASE           (C7X_ALLOCATED_START + 0x00200000)
#define C7X_VECTOR_BASE         (C7X_ALLOCATED_START + 0x00400000)
#define C7X_DDR_SPACE_BASE      (C7X_ALLOCATED_START + 0x00410000)
#define C7X_DDR_NEAR_BASE       (C7X_ALLOCATED_START + 0x01F00000)
#define C7X_DDR_FAR_BASE        (C7X_ALLOCATED_START + 0x01F80000)
#define C7X_DDR_EXT_BASE        (C7X_ALLOCATED_START + 0x02000000)

MEMORY
{
  L2SRAM_CINIT (RWX)  : org = 0x7E000000, len = 0x000100 //for 256byte init
  L2SRAM (RWX)        : org = 0x7E000100, len = 0x0fff00 //for 1MBytes  EL2
  L2SRAMAUX   (RWX): org = 0x7F000000, len = 0x040000   // for 256 KBytes AM62A
  L1DSRAM  (RWX): org = 0x64E00000, len = 0x004000   // 16kB, for J7

  EXTMEM_STATIC   (RWX): org = 0x80000000, len = 0x200000
  EXTMEM_DATACN   (RWX): org = 0x80200000, len = 0x200000
 /* rem EXTMEM   (RWX): org = 0x80400000, len = 0x200000 */
  EXTMEM   (RWX): org = 0x80400000, len = 0x08000000
  /* rem EXTMEM   (RWX): org = 0x80410000, len = 0x1F0000*/		/* 0702 実行エラー対策 */ 
  /* rem EXTMEM   (RWX): org = 0x80600000, len = 0x400000*/
  /* rem EXTMEMPAGE (RWX): org = 0x80A00000, len = 0x200000 */

  /* rem EXTMEM_FXBUF (RWX):   org = 0x80600000,    len = 0x08000000	*/		/* 128MB DDR */
}

SECTIONS
{
    boot:
    {
      boot.*<boot.oe71>(.text)
    } load > EXTMEM ALIGN(0x200000)
	.vecs		>			EXTMEM ALIGN(0x80000)
	.secure_vecs	>		EXTMEM ALIGN(0x200000)
	.text:_c_int00 > 		EXTMEM ALIGN(0x200000)
	.text:_c_int00_secure > EXTMEM ALIGN(0x200000)
	.text     	>			EXTMEM  	  ALIGN(0x2000)
	.bss 		>			EXTMEM_DATACN
    RUN_START(__BSS_START)
    RUN_END(__BSS_END)  
	.cio      	>			L2SRAM
	.const    	>			L2SRAM
	.stack    	>			EXTMEM ALIGN(0x2000)
	.data       >			EXTMEM
	.switch     >			EXTMEM
	.sysmem		>			EXTMEM
	.far		>			EXTMEM
	.args       >			EXTMEM
	.ppinfo		>			EXTMEM
	.ppdata		>			EXTMEM
	.pinit		>			L2SRAM
	.cinit     	>			EXTMEM
	.binit		>			EXTMEM
	.init_array >			EXTMEM
	.neardata	>			EXTMEM
	.fardata	>			EXTMEM
	.rodata		>			EXTMEM
	.c6xabi.exidx	>		EXTMEM
	.c6xabi.extab	>		EXTMEM
	.vectors	>			EXTMEM
	.version_data	>		EXTMEM
	.table		>			EXTMEM
	/* rem .sdram		>			EXTMEM_FXBUF */
	.sdram		>			EXTMEM
	.src_table		>		EXTMEM

    GROUP:              >  EXTMEM
    {
        .data.Mmu_tableArray          : type=NOINIT
        .data.Mmu_tableArraySlot      : type=NOINIT
        .data.Mmu_level1Table         : type=NOINIT
        .data.gMmu_tableArray_NS       : type=NOINIT
        .data.Mmu_tableArraySlot_NS   : type=NOINIT
        .data.Mmu_level1Table_NS      : type=NOINIT
    }

    .benchmark_buffer:     > EXTMEM ALIGN (32)

}

Fullscreen 1452.linker.cmd.txt Download

--ram_model
-heap  0x20000
-stack 0x20000
--args 0x1000
--diag_suppress=10068 /* to suppress no matching section error */
--cinit_compression=off
-e _c_int00_secure

#define DDR0_ALLOCATED_START  0x80000000
#define C7X_ALLOCATED_START DDR0_ALLOCATED_START + 0x19800000

#define C7X_RESOURCE_TABLE_BASE (C7X_ALLOCATED_START + 0x00100000)
#define C7X_BOOT_BASE           (C7X_ALLOCATED_START + 0x00200000)
#define C7X_VECTOR_BASE         (C7X_ALLOCATED_START + 0x00400000)
#define C7X_DDR_SPACE_BASE      (C7X_ALLOCATED_START + 0x00410000)

MEMORY
{
    L2SRAM (RWX):  org = 0x7E000000,          len = 0x00100000
    DDR0_RESERVED: org = 0x80000000,          len = 0x19800000   /*  Reserved for A53 OS */
    C7X_IPC_D:     org = C7X_ALLOCATED_START, len = 0x00100000   /*  1MB DDR */
    C7X_BOOT_D:    org = C7X_BOOT_BASE,       len = 0x400        /*  1024B DDR */
    C7X_VECS_D:    org = C7X_VECTOR_BASE,     len = 0x4000       /*  16KB DDR */
    C7X_CIO_MEM:   org = C7X_DDR_SPACE_BASE,  len = 0x1000       /*  4KB DDR */
/*  C7X_DDR_SPACE: org = C7X_DDR_SPACE_BASE+0x1000, len = 0x01BF0000-0x1000 */ /*  27.9MB - 4KB DDR  */
    C7X_DDR_SPACE: org = C7X_DDR_SPACE_BASE+0x1000, len = 0x04000000
}

SECTIONS
{
    boot:
    {
      boot.*<boot.oe71>(.text)
    } load > C7X_BOOT_D ALIGN(0x200000)
    .vecs       >       C7X_VECS_D ALIGN(0x400000)
    .secure_vecs    >   C7X_DDR_SPACE ALIGN(0x200000)
    .text:_c_int00_secure > C7X_DDR_SPACE ALIGN(0x200000)
    .text       >       C7X_DDR_SPACE ALIGN(0x200000)

    .bss        >       C7X_DDR_SPACE  /* Zero-initialized data */
    RUN_START(__BSS_START)
    RUN_END(__BSS_END)

    .data       >       C7X_DDR_SPACE  /* Initialized data */

    .cinit      >       C7X_DDR_SPACE  /* could be part of const */
    .init_array >       C7X_DDR_SPACE  /* C++ initializations */
    .stack      >       C7X_DDR_SPACE ALIGN(0x2000)
    .args       >       C7X_DDR_SPACE
    .cio        >       C7X_CIO_MEM
    .const      >       C7X_DDR_SPACE
    .switch     >       C7X_DDR_SPACE /* For exception handling. */
    .sysmem     >       C7X_DDR_SPACE /* heap */
	.sdram		>		C7X_DDR_SPACE

    GROUP:              >  C7X_DDR_SPACE
    {
        .data.Mmu_tableArray          : type=NOINIT
        .data.Mmu_tableArraySlot      : type=NOINIT
        .data.Mmu_level1Table         : type=NOINIT
        .data.gMmu_tableArray_NS       : type=NOINIT
        .data.Mmu_tableArraySlot_NS   : type=NOINIT
        .data.Mmu_level1Table_NS      : type=NOINIT
    }

    .benchmark_buffer:     > C7X_DDR_SPACE ALIGN (32)

}

Fullscreen 1452.example.syscfg.txt Download

/**
 * These arguments were used when this file was generated. They will be automatically applied on subsequent loads
 * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
 * @cliArgs --device "AM62Ax" --package "AMB" --part "Default" --context "c75ss0-0" --product "MCU_PLUS_SDK_AM62Ax@10.00.00"
 * @versions {"tool":"1.20.0+3587"}
 */

/**
 * Import the modules used in this configuration.
 */
const i2c         = scripting.addModule("/drivers/i2c/i2c", {}, false);
const i2c1        = i2c.addInstance();
const mcasp       = scripting.addModule("/drivers/mcasp/mcasp", {}, false);
const mcasp1      = mcasp.addInstance();
const debug_log   = scripting.addModule("/kernel/dpl/debug_log");
const mmu_armv8   = scripting.addModule("/kernel/dpl/mmu_armv8", {}, false);
const mmu_armv81  = mmu_armv8.addInstance();
const mmu_armv82  = mmu_armv8.addInstance();
const mmu_armv83  = mmu_armv8.addInstance();
const mmu_armv84  = mmu_armv8.addInstance();
const mmu_armv85  = mmu_armv8.addInstance();
const mmu_armv86  = mmu_armv8.addInstance();
const mmu_armv87  = mmu_armv8.addInstance();
const mmu_armv88  = mmu_armv8.addInstance();
const mmu_armv89  = mmu_armv8.addInstance();
const mmu_armv810 = mmu_armv8.addInstance();
const mmu_armv811 = mmu_armv8.addInstance();

/**
 * Write custom configuration values to the imported modules.
 */
i2c1.$name           = "CONFIG_I2C0";
i2c1.I2C_child.$name = "drivers_i2c_v0_i2c_v0_template0";

mcasp1.$name                                   = "CONFIG_MCASP0";
mcasp1.enableLoopback                          = false;
mcasp1.txDataMask                              = 0xFFFFFFFF;
mcasp1.txActiveSlotMask                        = 0x3;
mcasp1.txCallbackFxn                           = "mcasp_txcb";
mcasp1.rxCallbackFxn                           = "mcasp_rxcb";
mcasp1.rxDataMask                              = 0xFFFFFFFF;
mcasp1.rxActiveSlotMask                        = 0x3;
mcasp1.txFsSource                              = 0;
mcasp1.txAclkSource                            = 0;
mcasp1.rxFsSource                              = 0;
mcasp1.rxAclkSource                            = 0;
mcasp1.MCASP.$assignAllowConflicts             = "MCASP1";
mcasp1.mcaspSer.create(2);
mcasp1.mcaspSer[0].$name                       = "CONFIG_MCASP_SER0";
mcasp1.mcaspSer[0].MCASP.$assignAllowConflicts = "MCASP1";
mcasp1.mcaspSer[1].$name                       = "CONFIG_MCASP_SER1";
mcasp1.mcaspSer[1].serNum                      = 2;
mcasp1.mcaspSer[1].dataDir                     = "Receive";
mcasp1.mcaspSer[1].MCASP.$assignAllowConflicts = "MCASP1";
scripting.suppress("Resource conflict,MCASP1 is also in use by @@@.+?@@@, @@@.+?@@@", mcasp1.MCASP, "$assign");
scripting.suppress("Resource conflict,MCASP1 is also in use by @@@.+?@@@, @@@.+?@@@", mcasp1.mcaspSer[0].MCASP, "$assign");
scripting.suppress("Resource conflict,MCASP1 is also in use by @@@.+?@@@, @@@.+?@@@", mcasp1.mcaspSer[1].MCASP, "$assign");

const udma         = scripting.addModule("/drivers/udma/udma", {}, false);
const udma1        = udma.addInstance({}, false);
udma1.$name        = "CONFIG_UDMA0";
mcasp1.bcDmaDriver = udma1;

const udma2         = udma.addInstance({}, false);
udma2.$name         = "CONFIG_UDMA1";
mcasp1.pktDmaDriver = udma2;

debug_log.enableUartLog                   = true;
debug_log.enableCssLog                    = false;
debug_log.uartLog.$name                   = "CONFIG_UART0";
debug_log.uartLog.useMcuDomainPeripherals = true;

mmu_armv81.size  = 0x20000000;
mmu_armv81.$name = "REGISTER_REGION_0";

mmu_armv82.vAddr = 0x20000000;
mmu_armv82.pAddr = 0x20000000;
mmu_armv82.size  = 0x20000000;
mmu_armv82.$name = "REGISTER_REGION_1";

mmu_armv83.vAddr = 0x40000000;
mmu_armv83.pAddr = 0x40000000;
mmu_armv83.size  = 0x20000000;
mmu_armv83.$name = "REGISTER_REGION_2";

mmu_armv84.vAddr = 0x60000000;
mmu_armv84.pAddr = 0x60000000;
mmu_armv84.size  = 0x10000000;
mmu_armv84.$name = "FSS0_DAT_REGION";

mmu_armv85.vAddr = 0x7C200000;
mmu_armv85.pAddr = 0x7C200000;
mmu_armv85.$name = "CLEC";
mmu_armv85.size  = 0x100000;

mmu_armv86.$name = "DRU";
mmu_armv86.vAddr = 0x7C400000;
mmu_armv86.pAddr = 0x7C400000;
mmu_armv86.size  = 0x100000;

mmu_armv87.vAddr     = 0x80000000;
mmu_armv87.pAddr     = 0x80000000;
mmu_armv87.size      = 0x20000000;
mmu_armv87.attribute = "MAIR7";
mmu_armv87.$name     = "DDR_0";

mmu_armv88.vAddr     = 0xA0000000;
mmu_armv88.pAddr     = 0xA0000000;
mmu_armv88.size      = 0x20000000;
mmu_armv88.$name     = "DDR_1";
mmu_armv88.attribute = "MAIR7";

mmu_armv89.vAddr     = 0xAA000000;
mmu_armv89.pAddr     = 0xAA000000;
mmu_armv89.size      = 0x2000000;
mmu_armv89.attribute = "MAIR4";
mmu_armv89.$name     = "DDR_2";

mmu_armv810.$name       = "MCASP";
mmu_armv810.vAddr       = 0x2B10000;
mmu_armv810.pAddr       = 0x2B10000;
mmu_armv810.size        = 0x2000000;
mmu_armv810.privExecute = false;

mmu_armv811.$name     = "CCS_DEBUG_LOG_MEM";
mmu_armv811.vAddr     = 0x99C10000;
mmu_armv811.pAddr     = 0x99C10000;
mmu_armv811.size      = 0x1000;
mmu_armv811.attribute = "MAIR4";

/**
 * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
 * version of the tool will not impact the pinmux you originally saw.  These lines can be completely deleted in order to
 * re-solve from scratch.
 */
i2c1.I2C.$suggestSolution                       = "I2C1";
i2c1.I2C.SCL.$suggestSolution                   = "I2C1_SCL";
i2c1.I2C.SDA.$suggestSolution                   = "I2C1_SDA";
mcasp1.MCASP.AFSX.$suggestSolution              = "GPMC0_WAIT0";
mcasp1.MCASP.ACLKX.$suggestSolution             = "GPMC0_BE0n_CLE";
mcasp1.MCASP.AFSR.$suggestSolution              = "GPMC0_CSn2";
mcasp1.MCASP.ACLKR.$suggestSolution             = "GPMC0_CSn3";
mcasp1.SYSTEM.$suggestSolution                  = "SYSTEM0";
mcasp1.mcaspSer[0].MCASP.AXR0.$suggestSolution  = "GPMC0_WEn";
mcasp1.mcaspSer[1].MCASP.AXR2.$suggestSolution  = "GPMC0_ADVn_ALE";
debug_log.uartLog.MCU_UART.$suggestSolution     = "MCU_USART0";
debug_log.uartLog.MCU_UART.RXD.$suggestSolution = "MCU_UART0_RXD";
debug_log.uartLog.MCU_UART.TXD.$suggestSolution = "MCU_UART0_TXD";

The problem is that after loading the build program, it remains running without reaching main.
Stopping it with the debugger results in the following error.

C7XSS0_0: Trouble Halting Target CPU: (Error -1344 - (0:0:0)) Register or Memory request has failed due to a Transaction Error. This may be the result of reading from a write only register, writing to a read only register, or accessing a memory location that is not assigned. No user action required. (Emulation package 20.0.0.3178)
C7XSS0_0: Error: (Error -1351 - (0:0:0)) Register or Memory request has timed out. The CPU is executing a High Priority Interrupt, this is typically due to a Double Page Fault. Choose 'Force' to force the CPU into a state that allows debug of why the HPI is active. (Emulation package 20.0.0.3178)

Please let us know if any information is missing.

Best regrads,
O.H

0 Shreyansh Anand 1 month ago in reply to O.H

TI__Expert 7190 points

Hi O.H,

O.H said:
Please let us know if any information is missing.

Are you running any example from the SDK? Would it be possible to share the code snippet which can help me reproduce the issue quickly?

Thanks,
Shreyansh

0 O.H 1 month ago in reply to Shreyansh Anand

Mastermind 6480 points

Hi Shreyansh,

Sorry for late.

The .syscfg is based on the sample project below, but the entrypoint problem is the same for sample projects such as empty.
C:\ti\mcu_plus_sdk_am62ax_11_01_00_16\examples\drivers\mcasp\mcasp_loopback

Best regards,
O.H

0 Shreyansh Anand 1 month ago in reply to O.H

TI__Expert 7190 points

Hi O.H,
Thank you for providing the information. I am working on the issue. I will share an update as soon as I have a better understanding.

Thanks,
Shreyansh

0 O.H 16 days ago in reply to Shreyansh Anand

Mastermind 6480 points

Hi Shreyansh,

Sorry for rush you. Is there any update? It would be helpful if you could explain the situation.

Best regards,
O.H

0 Mukul Bhatnagar 16 days ago in reply to O.H

TI__Guru* 84455 points

Hello

Please expect delay this week as several team members in India are out of office due to religious holidays. Expect response/update towards the end of the week or early next week

0 Shreyansh Anand 2 days ago in reply to Mukul Bhatnagar

TI__Expert 7190 points

Hi O.H,
Apologies for the delay on responding to this thread.
I found couple of issues with your linker and mmu configurations:

Please refer to linker below:

-heap  0xF0000   // 756 kB
/* -stack 0x4000    //  16 kB */
-stack 0x20000    //  128 kB
--cinit_compression=off
--args 0x1000
--diag_suppress=10068 // "no matching section"
-e _c_int00_secure
/* -e _c_int00 */

/* #define DDR0_ALLOCATED_START  0x80000000 */
/* #define C7X_ALLOCATED_START DDR0_ALLOCATED_START + 0x19800000 */
#define C7X_ALLOCATED_START 0x80000000

#define C7X_RESOURCE_TABLE_BASE (C7X_ALLOCATED_START + 0x00100000)
#define C7X_BOOT_BASE           (C7X_ALLOCATED_START + 0x00200000)
#define C7X_VECTOR_BASE         (C7X_ALLOCATED_START + 0x00400000)
#define C7X_DDR_SPACE_BASE      (C7X_ALLOCATED_START + 0x00410000)
#define C7X_DDR_NEAR_BASE       (C7X_ALLOCATED_START + 0x01F00000)
#define C7X_DDR_FAR_BASE        (C7X_ALLOCATED_START + 0x01F80000)
#define C7X_DDR_EXT_BASE        (C7X_ALLOCATED_START + 0x02000000)

MEMORY
{
  L2SRAM_CINIT (RWX)  : org = 0x7E000000, len = 0x000100 //for 256byte init
  L2SRAM (RWX)        : org = 0x7E000100, len = 0x0fff00 //for 1MBytes  EL2
  L2SRAMAUX   (RWX): org = 0x7F000000, len = 0x040000   // for 256 KBytes AM62A
  L1DSRAM  (RWX): org = 0x64E00000, len = 0x004000   // 16kB, for J7

  EXTMEM_STATIC   (RWX): org = 0x80000000, len = 0x200000
  EXTMEM_DATACN   (RWX): org = 0x80200000, len = 0x200000
 /* rem EXTMEM   (RWX): org = 0x80400000, len = 0x200000 */
  EXTMEM   (RWX): org = 0x80400000, len = 0x08000000
  /* rem EXTMEM   (RWX): org = 0x80410000, len = 0x1F0000*/		/* 0702 実行エラー対策 */ 
  /* rem EXTMEM   (RWX): org = 0x80600000, len = 0x400000*/
  /* rem EXTMEMPAGE (RWX): org = 0x80A00000, len = 0x200000 */

  /* rem EXTMEM_FXBUF (RWX):   org = 0x80600000,    len = 0x08000000	*/		/* 128MB DDR */
}

SECTIONS
{
    boot:
    {
      boot.*<boot.oe71>(.text)
    } load > EXTMEM ALIGN(0x200000)
	.vecs		>			EXTMEM ALIGN(0x400000)
	.secure_vecs	>		EXTMEM ALIGN(0x200000)
	.text:_c_int00_secure > EXTMEM ALIGN(0x200000)
	.text     	>			EXTMEM  	  ALIGN(0x2000)
	.bss 		>			EXTMEM_DATACN
    RUN_START(__BSS_START)
    RUN_END(__BSS_END)  
	.cio      	>			L2SRAM
	.const    	>			L2SRAM
	.stack    	>			EXTMEM ALIGN(0x2000)
	.data       >			EXTMEM
	.switch     >			EXTMEM
	.sysmem		>			EXTMEM
	.far		>			EXTMEM
	.args       >			EXTMEM
	.ppinfo		>			EXTMEM
	.ppdata		>			EXTMEM
	.pinit		>			L2SRAM
	.cinit     	>			EXTMEM
	.binit		>			EXTMEM
	.init_array >			EXTMEM
	.neardata	>			EXTMEM
	.fardata	>			EXTMEM
	.rodata		>			EXTMEM
	.c6xabi.exidx	>		EXTMEM
	.c6xabi.extab	>		EXTMEM
	.vectors	>			EXTMEM
	.version_data	>		EXTMEM
	.table		>			EXTMEM
	/* rem .sdram		>			EXTMEM_FXBUF */
	.sdram		>			EXTMEM
	.src_table		>		EXTMEM

    GROUP:              >  EXTMEM
    {
        .data.Mmu_tableArray          : type=NOINIT
        .data.Mmu_tableArraySlot      : type=NOINIT
        .data.Mmu_level1Table         : type=NOINIT
        .data.gMmu_tableArray_NS       : type=NOINIT
        .data.Mmu_tableArraySlot_NS   : type=NOINIT
        .data.Mmu_level1Table_NS      : type=NOINIT
    }

    .benchmark_buffer:     > EXTMEM ALIGN (32)

}

I have deleted the ".text:_c_int00 > EXTMEM ALIGN(0x200000)" section, since it was not being used. Other than this, the .vecs and .text needs to be aligned to 0x400000 and 0x200000 respectively.

Also, you need to add the L2SRAM to the mmu configuration:

You will also need to add L2SRAM_AUX if you intend to use that region as well.

I tried empty project with the linker and mmu configuration, and it is working.

Thanks,
Shreyansh

0 O.H 21 hours ago in reply to Shreyansh Anand

Mastermind 6480 points

Hi Shreyansh,

Thank you very msuch for your support despite your busy schedule. We will try the content you provided.

Best regards,
O.H

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SK-AM62A-LP: Specifying _c_int00_secure as the entry_point results in a runtime error.