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IND-COMMS-SDK: ESC: latch input conf with PDI

HS FAE Germany
Mastermind 32700 points

Part Number: IND-COMMS-SDK

Tool/software:

Hi, 

the configuration of the latch inputs to the single event mode does not appear to be possible via the PDI (register 0x9A8/0x9A9). There are no timestamps either.
In the "ESC" tab list, the tabs are shown as read-only. The registers can be written in the real ET1100 from Beckhoff.(See screenshots below).
When the PLC writes the registers, it works. But not every PLC (e.g. Omron…) can do that. Therefore customer would like to configure this in the FW.

The problem already existed in the past: e2e.ti.com/.../problems-with-ethercat-and-system-time-pdi-controlled 
How can the latch inputs be configure via the PDI?

https://software-dl.ti.com/processor-industrial-sw/esd/ind_comms_sdk/am243x/latest/docs/api_guide_am243x/ETHERCAT_SUBDEVICE_CONTROLLER_REGISTER_LIST.html

 ESC Datasheet Section II:

Regards, Holger

  • 0
    TI__Genius 12215 points

    Hi,

    The EtherCAT slave firmware supports two latches (Latch0 and Latch1), each capable of capturing timestamps on both rising and falling edges. Each latch can operate in either single-shot or continuous mode:

    • Single-shot mode: Captures once and requires re-arming
    • Continuous mode: Automatically captures timestamps on each edge

    The firmware has a specific mechanism to determine who owns the latch events - either the PDI or the EtherCAT MDevice:
    This is controlled via the Cyclic Unit Control (0x980) ESC Register:

    • For Latch0: Bit 4 determines ownership (1 = PDI owns it)
    • For Latch1: Bit 5 determines ownership (1 = PDI owns it)

    While I get more details on the required configuration, what is the value in 0x0980 ESC Register of the customer setup?:

  • 0 in reply to Aaron Thomas
    TI__Mastermind 32700 points

    Hello Aaron,
    here are more information about latch. They want to use the digital input latch function. In the best case, configurable between continuous and single event mode.

    Register 0x980 is set to 0x0330. Therefore, the control of the latch in's should be at the PDI. The 0x0330 is also stored in the EEPROM in the category DC in AssignActivate. 

    From the point of view of TwinCAT, the PDI is also in control: 

    He wrioe the register 0x09a8 "Latch Control" with BSP_write_word(ECAT_PRU_HANDLE, 0x0303, ADDR_LATCH0_CTRL); .
    The value also arrives in the register after starting the firmware: 

    In their view, single event operation should be activated. Latch0 is connected to SYNC0. There are no timestamps. If he wrote the ESC register 0x09a8 to 0 and then to 0x0303 again via TwinCAT, the timestamps come. Unfortunately, this does not work with firmware.
    When the register is set to 0, timestamps (continuous mode) always come.

    How can they activate single event mode from the firmware? 

    Regards, Holger

  • +1 in reply to HS FAE Germany
    TI__Guru 50501 points
    HS FAE Germany said:
    How can they activate single event mode from the firmware? 

    They can directly activate this via 6.4.14.9.7 IEP_CAP_CFG_REG Register from EtherCAT application running on R5F. Keep double flop sync enable (Bit 17-10). Set Bit 9-6 to enable First Event Mode. In this case, new value is not latched till program read time stamp from corresponding CAPR/F6/7 register. Latch register update via ESC register interface is only possible from TwinCAT like MainDevice. But this should not be a problem here as long as configurability is there.

  • 0 in reply to PratheeshGangadhar
    TI__Mastermind 32700 points

    The configuration via the IEP registers works and we can use the latch pins accordingly.