DM8168 - PINCTRL & MUXMODE

Anyone?

Hello,

To use a GP pin, you should just need to enable GPIO clock and pincntl.  In the forum thread below there is attached a GEL file for the DM8148 that you might want to take a look at as an example.  It will be very similar for the DM8168.

https://e2e.ti.com/support/dsp/davinci_digital_media_processors/int-dm814x/f/720/t/153934.aspx#557819

Regards,
Marc

Thanks.

I try to write to the PINCTRL registers but their value doesn't change. It looks like they've become locked in some way. I'm making simple tests and creating projects in CCSv5.

When I click on the link you provided, I get a "group not found" message.

Oops - sorry about that.  Attached is the gel file.

Thanks for the GEL file. The procedure I'm trying is the same as that in the GEL file except I'm using different pins.

Within the GEL there is a function GPIO_SelectGPIO_0and1_Pinmux which attempts to select GPIO for half a dozen pins. The value that is written is 0x00040080. I have found the following behaviour:

If I reset my board and execute this function then the PINCNTL register does change. It goes to 0, not 0x00040080.

If I load (which automatically runs to main) ANY program that I have built within CCS, then all of the PINCNTL registers are not writeable.

Graeme,

Can you please check the memory map in CCS?  Sometimes the memory map in CCS can put certain memory as read only.

Regards,
Marc

Thanks.

The memory map looks fine, all RW.

I think the key point that I've found is that if I load a program without automatically running to 'main' then I can alter all of the registers OK. However, if I run to 'main' then these registers become non-writeable. Something before main sets them into a locked state.

Seems that the CPU need to be in priviledge/supervisor mode.
To go in this mode from CCS please look at the below post:
http://e2e.ti.com/support/dsp/integra_dsparm/f/625/t/116166.aspx#422744

Also it seems that for DM814x the PLLSS_MMR_LOCK register need to be access (see SPRUGZ8).
But DM816x does not seem to have this register so CPU being in priviledge/supervisor mode seem the be enough.

Anthony

Hi Graeme,

I am facing a similar issue here. Can you tell me what did you modify in boot.asm file to get into supervisor mode? I am able to write in pincntl regiters from the gel script but not from the CCS program.. any help will be useful

thanks 

best regards

hitesh

Hi

Gosh, that's a while back. But what I recall is that I extracted boot.asm from rts.lib and made a couple of alterations.

Around line 124 comment out the following:

;------------------------------------------------------
;* DO NOT SET TO USER MODE (modified 170112 GP)
;*------------------------------------------------------
MRS r0, cpsr
; BIC r0, r0, #0x1F ; CLEAR MODES
; ORR r0, r0, #0x10 ; SET USER MODE
MSR cpsr_cf, r0

And the same around line 264:

;*------------------------------------------------------
;* DO NOT SET TO USER MODE (modified 170112 GP)
;*------------------------------------------------------
MRS r0, cpsr
; BIC r0, r0, #0x1F ; CLEAR MODES
; ORR r0, r0, #0x10 ; SET USER MODE
MSR cpsr_cf, r0

Then include your modified boot.asm in your project (which will replace the one from rts.lib).

Hi Graeme,

Your method works perfectly. Thanks a lot for the help.

best regards 

hitesh