AUDIO-AM275-EVM: Building a custom AWE app with the AWE SDK by linking a third party library

#include "../../common/include/ti_am275_defs.h"

--ram_model
-heap  0x100010
-stack 0x20000
--args 0x1000
--diag_suppress=10068 /* to suppress no matching section error */
--cinit_compression=off
-e _c_int00_secure

MEMORY
{
    L2SRAM_VECS (RWX):   org = C75_0_VECS_BASE,      len = C75_VEC_SIZE
    L2SRAM (RWX):        org = C75_0_L2SRAM,         len = L2SRAM_SIZE
    L2SRAM_EXT (RWX):    org = C75_1_L2SRAM,         len = L2SRAM_SIZE

    SYS_OCRAM_ENTRY   (RWIX)     : org = C75_0_ENTRY_BASE, len = C75_ENTRY_SIZE
    SYS_OCRAM_PRGM_MEM  (RWIX)   : org = C75_0_MSRAM_PRGM_BASE, len = C75_PGRM_MSRAM_SIZE
    SYS_OCRAM_DATA_MEM  (RWIX)   : org = C75_0_MSRAM_DATA_BASE, len = C75_DATA_MSRAM_SIZE

    AWE_OCRAM_PRGM_MEM  (RWIX)   : org = C75_0_AWE_PRGM_BASE, len = AWE_PRGM_SIZE
    AWE_OCRAM_DATA_MEM  (RWIX)   : org = C75_0_AWE_DATA_BASE, len = AWE_DATA_SIZE

    /* Used for shared console log */
    SHM_SHARED_LOG:       org = C7_SHARED_LOG_BASE, len = SHARED_LOG_SIZE

    /* Tuning Packet for primary core */
    SHM_TUNING_PKT:       org = C7_TUNING_PKT_BASE,  len = TUNING_PKT_SIZE

    /* Shared memory for Multi-Instance AWE between Primary & Secondary Cores */
    SHARED_HEAP_MEM: 	 org = SHM_C7C7_HEAP_BASE, len = SHM_SHARED_HEAP_SIZE

    SHM_AVB_PCM_DATA_RX: org = C7_AVB_DATA_RX_BASE, len = AVB_DATA_SIZE
    SHM_AVB_PCM_DATA_TX: org = C7_AVB_DATA_TX_BASE, len = AVB_DATA_SIZE
}

SECTIONS
{
    .vecs       >       L2SRAM_VECS ALIGN(0x200000)
    .text:_c_int00_secure > SYS_OCRAM_ENTRY ALIGN(0x200000)
    .text       >       SYS_OCRAM_PRGM_MEM

    .bss > SYS_OCRAM_DATA_MEM
    RUN_START(__BSS_START)
    RUN_END(__BSS_END)

    .data       >       L2SRAM   /* Initialized data */
    .cinit      >       SYS_OCRAM_DATA_MEM   /* could be part of const */
    .init_array >       L2SRAM   /* C++ initializatioL2SRAMns */
    .stack (NOLOAD)  >  L2SRAM ALIGN(0x20000)   /* Needed for nested-interrupt */
    .args       >       SYS_OCRAM_DATA_MEM
    .cio        >       SYS_OCRAM_DATA_MEM
    .const      >       SYS_OCRAM_DATA_MEM
    .switch     >       L2SRAM  /* For exception handling. */
    .sysmem (NOLOAD) >  SYS_OCRAM_DATA_MEM  /* heap */

    audio_layout0_task_stack (NOLOAD) > L2SRAM

    GROUP:      >  SYS_OCRAM_DATA_MEM
    {
        .data.Mmu_tableArray          : type=NOINIT
        .data.Mmu_tableArraySlot      : type=NOINIT
        .data.Mmu_level1Table         : type=NOINIT
        .data.gMmu_tableArray_NS      : type=NOINIT
        .data.Mmu_tableArraySlot_NS   : type=NOINIT
        .data.Mmu_level1Table_NS      : type=NOINIT
    }

    .bss.log_shared_mem (NOLOAD) : {} > SHM_SHARED_LOG
    .awe_tuning_pkt (NOLOAD) : {} > SHM_TUNING_PKT ALIGN(128)

    /* AWE Core - Data placement Heap */
    .awe_heap_fast (NOLOAD) > L2SRAM ALIGN(128)
    .awe_heap_fastb (NOLOAD) > L2SRAM ALIGN(128)
    .awe_heap_slow (NOLOAD) > L2SRAM_EXT ALIGN(128)

    /* AWE core - Code placement */
    .awe_prio0_fastcode > L2SRAM
    .awe_fw_fastcode  > L2SRAM
    .awe_mod_fastcode > L2SRAM

    .awe_mod_slowcode > AWE_OCRAM_PRGM_MEM ALIGN(128)
    .awe_fw_slowcode  > AWE_OCRAM_PRGM_MEM ALIGN(128)
    .awe_mod_slowdmdata > AWE_OCRAM_PRGM_MEM ALIGN(128)

    awe_mcasp_buffer (NOLOAD) > L2SRAM

    /* Shared Heap for Multi-Instance AWE */
    .awe_shared_heap (NOLOAD) > SHARED_HEAP_MEM ALIGN(128)

    /* AVB shared memory buffer */
    .asdk_avb_rx_buffer (NOLOAD)  > SHM_AVB_PCM_DATA_RX
    .asdk_avb_tx_buffer (NOLOAD)  > SHM_AVB_PCM_DATA_TX
}

#
# Auto generated makefile
#

include ${CURDIR}/../../asdk_am275_includes.mak

include $(MCU_PLUS_SDK_PATH)/imports.mak
include $(MCU_PLUS_SDK_PATH)/devconfig/devconfig.mak

CG_TOOL_ROOT=$(CGT_TI_C7000_PATH)

CC=$(CG_TOOL_ROOT)/bin/cl7x
LNK=$(CG_TOOL_ROOT)/bin/cl7x
STRIP=$(CG_TOOL_ROOT)/bin/strip7x
OBJCOPY=$(CG_TOOL_ROOT)/bin/
ifeq ($(OS), Windows_NT)
	PYTHON=python
else
	PYTHON=python3
endif

c7x_syscfg_file=audio_app_c7x_0.syscfg

ConfigName:=$(PROFILE)
APP_NAME:=audioApp_c7x_0
OUTNAME:=$(APP_NAME).$(PROFILE).out

BOOTIMAGE_PATH=$(abspath .)
BOOTIMAGE_NAME:=$(APP_NAME).$(PROFILE).appimage
BOOTIMAGE_NAME_XIP:=$(APP_NAME).$(PROFILE).appimage_xip
BOOTIMAGE_NAME_SIGNED:=$(APP_NAME).$(PROFILE).appimage.signed
BOOTIMAGE_RPRC_NAME:=$(APP_NAME).$(PROFILE).rprc
BOOTIMAGE_RPRC_NAME_XIP:=$(APP_NAME).$(PROFILE).rprc_xip
BOOTIMAGE_RPRC_NAME_TMP:=$(APP_NAME).$(PROFILE).rprc_tmp
BOOTIMAGE_NAME_HS:=$(APP_NAME).$(PROFILE).appimage.hs
BOOTIMAGE_NAME_HS_FS:=$(APP_NAME).$(PROFILE).appimage.hs_fs
TARGETS := $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
   TARGETS += $(BOOTIMAGE_NAME_HS)
endif

FILES_common := \
	AudioDriver.c \
	IpcComm.c    \
	audio_mcasp.c  \
	gpio.c \
	awe_freeRTOS_wrapper.c \
	shm_cirbuf.c \
	platform.c \
	BoardSetup.c \
	TuningDriver.c \
	main.c \
	ti_drivers_config.c \
	ti_drivers_open_close.c \
	ti_board_config.c \
	ti_board_open_close.c \
	ti_dpl_config.c \
	ti_pinmux_config.c \
	ti_power_clock_config.c

#if OPTI_FLASH_SUPPORT is enabled in top-level makefile
ifeq ($(OPTI_FLASH_SUPPORT), 1)
   FILES_common += asdk_opti_flash.c
endif # $(OPTI_FLASH_SUPPORT) == 1

FILES_PATH_common = \
	.. \
	../../../common/src \
	generated \

INCLUDES_common := \
	-I${CG_TOOL_ROOT}/include \
	-I${MCU_PLUS_SDK_PATH}/source \
	-I${MCU_PLUS_SDK_PATH}/source/kernel/freertos/FreeRTOS-Kernel/include \
	-I${MCU_PLUS_SDK_PATH}/source/kernel/freertos/portable/TI_CGT/DSP_C75X \
	-I${MCU_PLUS_SDK_PATH}/source/kernel/freertos/config/am275x/c75x \
	-I${AWE8_CORE_C7_PATH}/Include \
	-I../../../common/include \
	-I../../../am275/common/include \
	-I../include \
        -Igenerated

DEFINES_common := \
	-DSOC_AM275X

# Build for multi-core/multi-instance
ifeq ($(BUILD_AWE_MULTI), 1)
DEFINES_common += -DAWE_MULTI_INSTANCE
endif # $(BUILD_AWE_MULTI)==1

#if AVB Audio is enabled in top-level makefile
ifeq ($(AVB_AUDIO), 1)
   DEFINES_common += -DENABLE_AVB_AUDIO
endif # $(AVB_AUDIO) == 1

#if OPTI_FLASH_SUPPORT is enabled in top-level makefile
ifeq ($(OPTI_FLASH_SUPPORT), 1)
   DEFINES_common += -DENABLE_OPTIFLASH
endif # $(OPTI_FLASH_SUPPORT) == 1

# Regression Test
ifeq ($(REGRESSION_TEST), 1)
   DEFINES_common += -DREGRESSION_TEST
endif # $(REGRESSION_TEST) == 1

#if Audio Daughter Card
ifeq ($(AEC_TAS6754_SUPPORT), 1)
DEFINES_common += -DAEC_TAS6754_SUPPORT
endif

CFLAGS_common := \
	-mv7524 \
	--mma_version=2_256 \
	--abi=eabi \
	-q \
	-mo \
	-pden \
	-pds=238 \
	-pds=880 \
	-pds1110 \
	--endian=little \
	--disable_inlining \
	-ea.se71 \
	--emit_warnings_as_errors \
	--diag_suppress=770 \
	--diag_suppress=69 \
	--diag_suppress=70 \
	-DAUDIO_BLOCK_SIZE=${ASDK_BLOCK_SIZE}

CFLAGS_debug := \
	-Dxdc_target_name__=C71 \
	-D_DEBUG_=1 \
	--opt_level=0 \
	--symdebug:dwarf \
	-DBUILD_C7X_1 \
	-DBUILD_C7X0_0 \
	-DBUILD_C7X \
	-DBUILD64 \
	-DAWE_DEFAULT_ALIGNMENT_WORDS=8 \

CFLAGS_release := \
	-Dxdc_target_name__=C71 \
	--opt_level=3 \
	--symdebug:none \
	-DBUILD_C7X_1 \
	-DBUILD_C7X0_0 \
	-DBUILD_C7X \
	-DBUILD64 \
	-DAWE_DEFAULT_ALIGNMENT_WORDS=8 \

LNK_FILES_common = \
	linker.cmd \

LIBS_PATH_common = \
	-i${MCU_PLUS_SDK_PATH}/source/kernel/freertos/lib \
	-i${MCU_PLUS_SDK_PATH}/source/drivers/lib \
	-i${MCU_PLUS_SDK_PATH}/source/board/lib \
	-i${MCU_PLUS_SDK_PATH}/source/drivers/udma/lib \
	-i${CG_TOOL_ROOT}/lib \
	-i${AWE8_CORE_C7_PATH}/Lib \
	-i${MATHLIB_PATH}/lib/Release \
	-i${DSPLIB_C7_PATH}/lib/Release \
	-i${FFTLIB_PATH}/lib/Release \

LIBS_common = \
	-lfreertos.am275x.c75x.ti-c7000.${ConfigName}.lib \
	-ldrivers.am275x.c75x.ti-c7000.${ConfigName}.lib \
	-lboard.am275x.c75x.ti-c7000.${ConfigName}.lib \
	-ludma.am275x.c75x.ti-c7000.${ConfigName}.lib \
	-llibc.a \
	-llibAWECore.a \
	-lMATHLIB_C7524.lib \
	-lDSPLIB_C7524.lib \
	-lDSPLIB_common_C7524.lib \
	-lFFTLIB_C7524.lib \
#	-llibVectorLib.a

LFLAGS_common = \
	--silicon_version=7524 \
	--opt_for_speed=4  \
	-z \
	--emit_warnings_as_errors \
	--diag_suppress=10063 \
	--ram_model \
	--warn_sections \
	-q \
	-x \
	 \

LIBDIRACAWE = \
	${CURDIR}/lib/DiracAWE/libDiracAweModule.a \
	${CURDIR}/lib/DiracAWE/libdirac_dar.a \
	${CURDIR}/lib/DiracAWE/libdirac_log.a \

LIBS_NAME = \
	freertos.am275x.c75x.ti-c7000.${ConfigName}.lib \
	drivers.am275x.c75x.ti-c7000.${ConfigName}.lib \
	board.am275x.c75x.ti-c7000.${ConfigName}.lib \
	udma.am275x.c75x.ti-c7000.${ConfigName}.lib \
	libc.a \

LIBS_PATH_NAME = \
	${MCU_PLUS_SDK_PATH}/source/kernel/freertos/lib \
	${MCU_PLUS_SDK_PATH}/source/drivers/lib \
	${MCU_PLUS_SDK_PATH}/source/board/lib \
	${MCU_PLUS_SDK_PATH}/source/drivers/udma/lib \
	${CG_TOOL_ROOT}/lib \

FILES := $(FILES_common) $(FILES_$(PROFILE))
ASMFILES := $(ASMFILES_common) $(ASMFILES_$(PROFILE))
FILES_PATH := $(FILES_PATH_common) $(FILES_PATH_$(PROFILE))
CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) $(LIBDIRACAWE)
LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))

OBJDIR := obj/$(PROFILE)/
OBJS := $(FILES:%.c=%.obj)
OBJS += $(ASMFILES:%.S=%.obj)
DEPS := $(FILES:%.c=%.d)

vpath %.obj $(OBJDIR)
vpath %.c $(FILES_PATH)
vpath %.S $(FILES_PATH)
vpath %.lib $(LIBS_PATH_NAME)
vpath %.a $(LIBS_PATH_NAME)

$(OBJDIR)/%.obj %.obj: %.c
	@echo  Compiling: am275x:c7x-0:freertos:ti-c7000 $(OUTNAME): $<
	$(CC) $(CFLAGS) $(INCLUDES) $(DEFINES) -ppd=$(OBJDIR)/$(basename $@).d -ppa -fr=$(OBJDIR)/ -fc=$<

$(OBJDIR)/%.obj %.obj: %.S
	@echo  Compiling: am275x:c7x-0:freertos:ti-c7000 $(LIBNAME): $<
	$(CC) $(CFLAGS) $(INCLUDES) $(DEFINES) -ppd=$(OBJDIR)/$(basename $@).d -ppa -fr=$(OBJDIR)/ -fa=$<

all: $(TARGETS)

SYSCFG_GEN_FILES=generated/ti_drivers_config.c generated/ti_drivers_config.h
SYSCFG_GEN_FILES+=generated/ti_drivers_open_close.c generated/ti_drivers_open_close.h
SYSCFG_GEN_FILES+=generated/ti_dpl_config.c generated/ti_dpl_config.h
SYSCFG_GEN_FILES+=generated/ti_pinmux_config.c generated/ti_power_clock_config.c
SYSCFG_GEN_FILES+=generated/ti_board_config.c generated/ti_board_config.h
SYSCFG_GEN_FILES+=generated/ti_board_open_close.c generated/ti_board_open_close.h

$(OUTNAME): syscfg $(SYSCFG_GEN_FILES) $(OBJS) $(LNK_FILES) $(LIBS_NAME)
	@echo  .
	@echo  Linking: am275x:c7x-0:freertos:ti-c7000 $@ ...
	$(LNK) $(LFLAGS) $(LIBS_PATH) -m=$(basename $@).map -o $@ $(addprefix $(OBJDIR), $(OBJS)) $(LIBS) $(LNK_FILES)
	@echo  Linking: am275x:c7x-0:freertos:ti-c7000 $@ Done !!!
	@echo  .

clean:
	@echo  Cleaning: am275x:c7x-0:freertos:ti-c7000 $(OUTNAME) ...
	$(RMDIR) $(OBJDIR)
	$(RM) $(OUTNAME)
	$(RM) $(BOOTIMAGE_NAME)
	$(RM) $(BOOTIMAGE_NAME_XIP)
	$(RM) $(BOOTIMAGE_NAME_SIGNED)
	$(RM) $(BOOTIMAGE_NAME_HS)
	$(RM) $(BOOTIMAGE_NAME_HS_FS)
	$(RMDIR) generated/

scrub:
	@echo  Scrubing: am275x:c7x-0:freertos:ti-c7000 $(APP_NAME) ...
	$(RMDIR) obj
ifeq ($(OS),Windows_NT)
	$(RM) \*.out
	$(RM) \*.map
	$(RM) \*.mcelf*
	$(RM) \*.appimage*
	$(RM) \*.tiimage*
	$(RM) \*.bin
else
	$(RM) *.out
	$(RM) *.map
	$(RM) *.mcelf*
	$(RM) *.appimage*
	$(RM) *.tiimage*
	$(RM) *.bin
endif
	$(RMDIR) generated

$(OBJS): | $(OBJDIR)

$(OBJDIR):
	$(MKDIR) $@

.NOTPARALLEL:

.INTERMEDIATE: syscfg
$(SYSCFG_GEN_FILES): syscfg

syscfg: ../$(c7x_syscfg_file)
	@echo Generating SysConfig files ...
	$(SYSCFG_NODE) $(SYSCFG_CLI_PATH)/dist/cli.js --product $(SYSCFG_SDKPRODUCT) --device AM275x --context c75ss0-0 --part AM2754 --package ANJ --output generated/ ../$(c7x_syscfg_file)

syscfg-gui:
	$(SYSCFG_NWJS) $(SYSCFG_PATH) --product $(SYSCFG_SDKPRODUCT) --device AM275x --context c75ss0-0 --part AM2754 --package ANJ --output generated/  ../$(c7x_syscfg_file)

#
# Generation of boot image which can be loaded by Secondary Boot Loader (SBL)
#
ifeq ($(OS),Windows_NT)
EXE_EXT=.exe
endif
ifeq ($(OS),Windows_NT)
  BOOTIMAGE_CERT_GEN_CMD=powershell -executionpolicy unrestricted -command $(MCU_PLUS_SDK_PATH)/tools/boot/signing/x509CertificateGen.ps1
else
  BOOTIMAGE_CERT_GEN_CMD=$(MCU_PLUS_SDK_PATH)/tools/boot/signing/x509CertificateGen.sh
endif
BOOTIMAGE_TEMP_OUT_FILE=temp_stdout_$(PROFILE).txt

BOOTIMAGE_CERT_KEY=$(APP_SIGNING_KEY)

BOOTIMAGE_CORE_ID_wkup-r5fss0-0 = 0
BOOTIMAGE_CORE_ID_r5fss0-0      = 1
BOOTIMAGE_CORE_ID_r5fss0-1      = 2
BOOTIMAGE_CORE_ID_r5fss1-0      = 3
BOOTIMAGE_CORE_ID_r5fss1-1      = 4
BOOTIMAGE_CORE_ID_c75ss0-0      = 5
BOOTIMAGE_CORE_ID_c75ss1-0      = 6
BOOTIMAGE_CORE_ID_hsm-m4fss0-0  = 7
SBL_RUN_ADDRESS=0x72000000
SBL_DEV_ID=55

MCELF_IMAGE_GEN = $(MCU_PLUS_SDK_PATH)/tools/boot/multicoreELFImageGen/genimage.py
APP_IMAGE_SIGN_CMD = $(MCU_PLUS_SDK_PATH)/tools/boot/signing/appimage_x509_cert_gen.py

ifeq ($(OS),Windows_NT)
  XIPGEN_CMD=$(MCU_PLUS_SDK_PATH)/tools/boot/xipGen/xipGen.exe
else
  XIPGEN_CMD=$(MCU_PLUS_SDK_PATH)/tools/boot/xipGen/xipGen.out
endif

MULTI_CORE_IMAGE_PARAMS = \
    $(BOOTIMAGE_CORE_ID_c75ss0-0):$(OUTNAME) \

MCELF_XIP_RANGE?=0x60100000:0x60200000

$(BOOTIMAGE_NAME): $(OUTNAME)
	@echo  Boot image: am275x:c75ss0-0:freertos:ti-c7000 $(BOOTIMAGE_PATH)/$@ ...
ifneq ($(OS),Windows_NT)
	$(CHMOD) a+x $(XIPGEN_CMD)
endif
	$(PYTHON) $(MCELF_IMAGE_GEN) --core-img=$(MULTI_CORE_IMAGE_PARAMS) --output=$(BOOTIMAGE_NAME) --xip=$(MCELF_XIP_RANGE) --sw_version=$(SW_VERSION)
# Sign the appimage for HS-FS using appimage signing script
    #
    #   Authentication type 0 with load address 0x84000000
    #
	$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 0  --loadaddr 84000000 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS_FS) --keyversion $(VERSION)
	@echo  Boot image: am275x:c75ss0-0:freertos:ti-c7000 $(BOOTIMAGE_PATH)/$@ Done !!!
	@echo  .
	@echo  Boot image: am275x:c75ss0-0:freertos:ti-c7000 $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS_FS) Done !!!
	@echo  .

$(BOOTIMAGE_NAME_HS): $(BOOTIMAGE_NAME)
ifeq ($(DEVICE_TYPE), HS)
# Sign the appimage using appimage signing script
ifeq ($(ENC_ENABLED),no)
	@echo Boot image signing: Encryption is disabled.
    #
    #   Authentication type 0 with load address 0x84000000
    #
	$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 0  --loadaddr 84000000 --key $(APP_SIGNING_KEY) --output $(BOOTIMAGE_NAME_HS) --keyversion $(VERSION)
else
	@echo Boot image signing: Encryption is enabled.
    #
    #   Authentication type 0 with load address 0x84000000
    #
	$(PYTHON) $(APP_IMAGE_SIGN_CMD) --bin $(BOOTIMAGE_NAME) --authtype 0  --loadaddr 84000000 --key $(APP_SIGNING_KEY) --enc y --enckey $(APP_ENCRYPTION_KEY) --output $(BOOTIMAGE_NAME_HS) --keyversion $(VERSION)
	$(RM) $(BOOTIMAGE_NAME)-enc
endif
	@echo  Boot image: am275x:c75ss0-0:freertos:ti-c7000 $(BOOTIMAGE_PATH)/$(BOOTIMAGE_NAME_HS) Done !!!
	@echo  .
endif
-include $(addprefix $(OBJDIR)/, $(DEPS))

--- /home/sreekanth/dev/bsp_awe-ti/am275x/audio_app/./am275/asdk_am275_includes.mak	2025-11-22 06:31:49.108583233 +0000
+++ /home/sreekanth/dev-test/bsp_awe-ti/am275x/audio_app/./am275/asdk_am275_includes.mak	2025-11-17 13:45:19.840168120 +0000
@@ -59,6 +59,7 @@
 REGRESSION_TEST = 0
 
 CWD := $(abspath $(patsubst %/,%,$(dir $(abspath $(lastword $(MAKEFILE_LIST))))))
+export REPO_ROOT := $(abspath ${CWD}/../../../)
 
 # AWE Code Path
 export AWE8_CORE_C7_PATH?=$(abspath ${CWD}/../../packages/dspc/c7x/${DEVICE}/AWECore)
--- /home/sreekanth/dev/bsp_awe-ti/am275x/audio_app/./am275/c75_0/audio_app_c7x_0.syscfg	2025-11-22 06:31:37.653252050 +0000
+++ /home/sreekanth/dev-test/bsp_awe-ti/am275x/audio_app/./am275/c75_0/audio_app_c7x_0.syscfg	2025-11-17 14:04:23.927459401 +0000
@@ -31,6 +31,8 @@
 const mmu_armv811 = mmu_armv8.addInstance();
 const mmu_armv812 = mmu_armv8.addInstance();
 const mmu_armv813 = mmu_armv8.addInstance();
+const mmu_armv814 = mmu_armv8.addInstance();
+const mmu_armv815 = mmu_armv8.addInstance();
 
 /**
  * Write custom configuration values to the imported modules.
@@ -103,9 +105,9 @@
 mcasp2.txHclkSource                                     = 0;
 mcasp2.txHclkSourceMux                                  = 4;
 mcasp2.txLoopjobBuf                                     = "gTxLoopjobBuf1";
-mcasp2.txFsWidth                                      = 0;
-mcasp2.txDataDelay                                    = 0;
-mcasp2.txFsPolarity                                   = 0;
+mcasp2.txFsWidth                                        = 0;
+mcasp2.txDataDelay                                      = 0;
+mcasp2.txFsPolarity                                     = 0;
 mcasp2.mcaspSer.create(1);
 mcasp2.mcaspSer[0].$name                                = "CONFIG_MCASP_SER2";
 mcasp2.mcaspSer[0].MCASP.$assignAllowConflicts          = "MCASP0";
@@ -147,17 +149,17 @@
 mmu_armv84.$name = "CLEC";
 mmu_armv84.size  = 0x100000;
 
-mmu_armv85.$name     = "L2RAM";
 mmu_armv85.vAddr     = 0x7E000000;
 mmu_armv85.pAddr     = 0x7E000000;
 mmu_armv85.size      = 0x200000;
 mmu_armv85.attribute = "MAIR7";
+mmu_armv85.$name     = "L2RAM0";
 
-mmu_armv86.$name     = "L2RAM_AUX";
 mmu_armv86.vAddr     = 0x7E200000;
 mmu_armv86.pAddr     = 0x7E200000;
-mmu_armv86.size      = 0x100000;
 mmu_armv86.attribute = "MAIR7";
+mmu_armv86.$name     = "L2RAM0_AUX";
+mmu_armv86.size      = 0x40000;
 
 mmu_armv87.$name     = "MSRAM_REGION_0";
 mmu_armv87.vAddr     = 0x80000000;
@@ -199,6 +201,18 @@
 mmu_armv813.size      = 0x200000;
 mmu_armv813.attribute = "MAIR7";
 
+mmu_armv814.size      = 0x200000;
+mmu_armv814.attribute = "MAIR7";
+mmu_armv814.vAddr     = 0x7F000000;
+mmu_armv814.pAddr     = 0x7F000000;
+mmu_armv814.$name     = "L2RAM1";
+
+mmu_armv815.attribute = "MAIR7";
+mmu_armv815.$name     = "L2RAM1_AUX0";
+mmu_armv815.vAddr     = 0x7F200000;
+mmu_armv815.pAddr     = 0x7F200000;
+mmu_armv815.size      = 0x40000;
+
 /**
  * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
  * version of the tool will not impact the pinmux you originally saw.  These lines can be completely deleted in order to
--- /home/sreekanth/dev/bsp_awe-ti/am275x/audio_app/./am275/c75_0/ti-c7000/linker.cmd	2025-11-22 06:31:49.108583233 +0000
+++ /home/sreekanth/dev-test/bsp_awe-ti/am275x/audio_app/./am275/c75_0/ti-c7000/linker.cmd	2025-11-22 05:57:31.741837045 +0000
@@ -1,7 +1,7 @@
 #include "../../common/include/ti_am275_defs.h"
 
 --ram_model
--heap  0x2000
+-heap 0x20000
 -stack 0x20000
 --args 0x1000
 --diag_suppress=10068 /* to suppress no matching section error */
@@ -10,48 +10,59 @@
 
 MEMORY
 {
-    L2SRAM_VECS (RWX):   org = C75_0_VECS_BASE,      len = C75_VEC_SIZE
-    L2SRAM (RWX):        org = C75_0_L2SRAM,         len = L2SRAM_SIZE
+    L2SRAM_VECS         (RWX)   : org = C75_0_VECS_BASE,            len = C75_VEC_SIZE
+    L2SRAM              (RWX)   : org = C75_0_L2SRAM,               len = C75_0_L2SRAM_SIZE
 
-    SYS_OCRAM_ENTRY   (RWIX)     : org = C75_0_ENTRY_BASE, len = C75_ENTRY_SIZE
-    SYS_OCRAM_PRGM_MEM  (RWIX)   : org = C75_0_MSRAM_PRGM_BASE, len = C75_PGRM_MSRAM_SIZE
-    SYS_OCRAM_DATA_MEM  (RWIX)   : org = C75_0_MSRAM_DATA_BASE, len = C75_DATA_MSRAM_SIZE
+    /* Dedicated SYSTEM HEAP (.sysmem) (128 kB) */
+    C7X_SYSMEM_MEM      (RWIX)  : org = C7X_SYSMEM_BASE,            len = C7X_SYSMEM_SIZE
 
-    AWE_OCRAM_PRGM_MEM  (RWIX)   : org = C75_0_AWE_PRGM_BASE, len = AWE_PRGM_SIZE
-    AWE_OCRAM_DATA_MEM  (RWIX)   : org = C75_0_AWE_DATA_BASE, len = AWE_DATA_SIZE
+    SYS_OCRAM_ENTRY     (RWIX)  : org = C75_0_ENTRY_BASE,           len = C75_ENTRY_SIZE
+    SYS_OCRAM_PRGM_MEM  (RWIX)  : org = C75_0_MSRAM_PRGM_BASE,      len = C75_PGRM_MSRAM_SIZE
+    SYS_OCRAM_DATA_MEM  (RWIX)  : org = C75_0_MSRAM_DATA_BASE,      len = C75_DATA_MSRAM_SIZE
+
+    AWE_OCRAM_PRGM_MEM  (RWIX)  : org = C75_0_AWE_PRGM_BASE,        len = AWE_PRGM_SIZE
+    AWE_OCRAM_DATA_MEM  (RWIX)  : org = C75_0_AWE_DATA_BASE,        len = AWE_DATA_SIZE
+
+    /* Dedicated AWE SLOW HEAP (1.1875MB) */
+    AWE_FAST_HEAP_A_MEM (RWIX)  : org = C7X_AWE_FAST_HEAP_A_BASE,   len = AWE_FAST_HEAP_A_SIZE
+    AWE_FAST_HEAP_B_MEM (RWIX)  : org = C7X_AWE_FAST_HEAP_B_BASE,   len = AWE_FAST_HEAP_B_SIZE
+    AWE_SLOW_HEAP_MEM   (RWIX)  : org = C7X_AWE_SLOW_HEAP_BASE,     len = AWE_SLOW_HEAP_SIZE
 
     /* Used for shared console log */
-    SHM_SHARED_LOG:       org = C7_SHARED_LOG_BASE, len = SHARED_LOG_SIZE
+    SHM_SHARED_LOG              : org = C7_SHARED_LOG_BASE,         len = SHARED_LOG_SIZE
 
     /* Tuning Packet for primary core */
-    SHM_TUNING_PKT:       org = C7_TUNING_PKT_BASE,  len = TUNING_PKT_SIZE
+    SHM_TUNING_PKT              : org = C7_TUNING_PKT_BASE,         len = TUNING_PKT_SIZE
 
     /* Shared memory for Multi-Instance AWE between Primary & Secondary Cores */
-    SHARED_HEAP_MEM: 	 org = SHM_C7C7_HEAP_BASE, len = SHM_SHARED_HEAP_SIZE
+    SHARED_HEAP_MEM             : org = SHM_C7C7_HEAP_BASE,         len = SHM_SHARED_HEAP_SIZE
 
-    SHM_AVB_PCM_DATA_RX: org = C7_AVB_DATA_RX_BASE, len = AVB_DATA_SIZE
-    SHM_AVB_PCM_DATA_TX: org = C7_AVB_DATA_TX_BASE, len = AVB_DATA_SIZE
+    SHM_AVB_PCM_DATA_RX         : org = C7_AVB_DATA_RX_BASE,        len = AVB_DATA_SIZE
+    SHM_AVB_PCM_DATA_TX         : org = C7_AVB_DATA_TX_BASE,        len = AVB_DATA_SIZE
+
+    /* Dedicated archive data */
+    DIRAC_DAR_DATA_MEM   (RWIX) : org = DIRAC_DAR_DATA_BASE,        len = DIRAC_DAR_DATA_SIZE
 }
 
 SECTIONS
 {
-    .vecs       >       L2SRAM_VECS ALIGN(0x200000)
-    .text:_c_int00_secure > SYS_OCRAM_ENTRY ALIGN(0x200000)
-    .text       >       SYS_OCRAM_PRGM_MEM
+    .vecs                   > L2SRAM_VECS ALIGN(0x200000)
+    .text:_c_int00_secure   > SYS_OCRAM_ENTRY ALIGN(0x200000)
+    .text                   > SYS_OCRAM_PRGM_MEM
 
-    .bss > SYS_OCRAM_DATA_MEM
+    .bss                    > SYS_OCRAM_DATA_MEM
     RUN_START(__BSS_START)
     RUN_END(__BSS_END)
 
-    .data       >       L2SRAM   /* Initialized data */
-    .cinit      >       L2SRAM   /* could be part of const */
-    .init_array >       L2SRAM   /* C++ initializatioL2SRAMns */
-    .stack (NOLOAD)  >  L2SRAM ALIGN(0x20000)   /* Needed for nested-interrupt */
-    .args       >       SYS_OCRAM_DATA_MEM
-    .cio        >       SYS_OCRAM_DATA_MEM
-    .const      >       L2SRAM
-    .switch     >       L2SRAM  /* For exception handling. */
-    .sysmem (NOLOAD) >  SYS_OCRAM_DATA_MEM  /* heap */
+    .data                   > L2SRAM                /* Initialized data */
+    .cinit                  > SYS_OCRAM_DATA_MEM    /* could be part of const */
+    .init_array             > L2SRAM                /* C++ initializations */
+    .stack (NOLOAD)         > L2SRAM ALIGN(0x20000) /* Needed for nested-interrupt */
+    .args                   > SYS_OCRAM_DATA_MEM
+    .cio                    > SYS_OCRAM_DATA_MEM
+    .const                  > L2SRAM
+    .switch                 > L2SRAM                /* For exception handling. */
+    .sysmem (NOLOAD)        > C7X_SYSMEM_MEM        /* heap */
 
     audio_layout0_task_stack (NOLOAD) > L2SRAM
 
@@ -65,29 +76,32 @@
         .data.Mmu_level1Table_NS      : type=NOINIT
     }
 
-    .bss.log_shared_mem (NOLOAD) : {} > SHM_SHARED_LOG
-    .awe_tuning_pkt (NOLOAD) : {} > SHM_TUNING_PKT ALIGN(128)
+    .bss.log_shared_mem (NOLOAD)    : {}    > SHM_SHARED_LOG
+    .awe_tuning_pkt (NOLOAD)        : {}    > SHM_TUNING_PKT ALIGN(128)
 
     /* AWE Core - Data placement Heap */
-    .awe_heap_fast (NOLOAD) > L2SRAM ALIGN(128)
-    .awe_heap_fastb (NOLOAD) > L2SRAM ALIGN(128)
-    .awe_heap_slow (NOLOAD) > L2SRAM ALIGN(128)
+    .awe_heap_fast (NOLOAD)     > AWE_FAST_HEAP_A_MEM ALIGN(128)
+    .awe_heap_fastb (NOLOAD)    > AWE_FAST_HEAP_B_MEM ALIGN(128)
+    .awe_heap_slow (NOLOAD)     > AWE_SLOW_HEAP_MEM ALIGN(128)
 
     /* AWE core - Code placement */
-    .awe_prio0_fastcode > L2SRAM
-    .awe_fw_fastcode  > L2SRAM
-    .awe_mod_fastcode > L2SRAM
-
-    .awe_mod_slowcode > AWE_OCRAM_PRGM_MEM ALIGN(128)
-    .awe_fw_slowcode  > AWE_OCRAM_PRGM_MEM ALIGN(128)
-    .awe_mod_slowdmdata > AWE_OCRAM_PRGM_MEM ALIGN(128)
+    .awe_prio0_fastcode         > L2SRAM
+    .awe_fw_fastcode            > L2SRAM
+    .awe_mod_fastcode           > L2SRAM
+
+    .awe_mod_slowcode           > AWE_OCRAM_PRGM_MEM ALIGN(128)
+    .awe_fw_slowcode            > AWE_OCRAM_PRGM_MEM ALIGN(128)
+    .awe_mod_slowdmdata         > AWE_OCRAM_PRGM_MEM ALIGN(128)
 
-    awe_mcasp_buffer (NOLOAD) > L2SRAM
+    awe_mcasp_buffer (NOLOAD)   > L2SRAM
 
     /* Shared Heap for Multi-Instance AWE */
-    .awe_shared_heap (NOLOAD) > SHARED_HEAP_MEM ALIGN(128)
+    .awe_shared_heap (NOLOAD)   > SHARED_HEAP_MEM ALIGN(128)
 
     /* AVB shared memory buffer */
     .asdk_avb_rx_buffer (NOLOAD)  > SHM_AVB_PCM_DATA_RX
     .asdk_avb_tx_buffer (NOLOAD)  > SHM_AVB_PCM_DATA_TX
+
+    /* Data buffer */
+    .dirac_dar_data (NOLOAD)  > DIRAC_DAR_DATA_MEM
 }
--- /home/sreekanth/dev/bsp_awe-ti/am275x/audio_app/./am275/c75_0/ti-c7000/makefile	2025-11-22 06:31:49.108583233 +0000
+++ /home/sreekanth/dev-test/bsp_awe-ti/am275x/audio_app/./am275/c75_0/ti-c7000/makefile	2025-11-21 10:51:49.070821786 +0000
@@ -187,6 +187,10 @@
 	-x \
 	 \
 
+LIBDIRACAWE = \
+	${CURDIR}/lib/DiracAWE/libDiracAweModule.a \
+	${CURDIR}/lib/DiracAWE/libdirac_dar.a \
+	${CURDIR}/lib/DiracAWE/libdirac_log.a \
 
 LIBS_NAME = \
 	freertos.am275x.c75x.ti-c7000.${ConfigName}.lib \
@@ -208,7 +212,7 @@
 CFLAGS := $(CFLAGS_common) $(CFLAGS_$(PROFILE))
 DEFINES := $(DEFINES_common) $(DEFINES_$(PROFILE))
 INCLUDES := $(INCLUDES_common) $(INCLUDE_$(PROFILE))
-LIBS := $(LIBS_common) $(LIBS_$(PROFILE))
+LIBS := $(LIBS_common) $(LIBS_$(PROFILE)) $(LIBDIRACAWE)
 LIBS_PATH := $(LIBS_PATH_common) $(LIBS_PATH_$(PROFILE))
 LFLAGS := $(LFLAGS_common) $(LFLAGS_$(PROFILE))
 LNK_FILES := $(LNK_FILES_common) $(LNK_FILES_$(PROFILE))
--- /home/sreekanth/dev/bsp_awe-ti/am275x/audio_app/./am275/common/include/ti_am275_defs.h	2025-11-22 06:31:49.108583233 +0000
+++ /home/sreekanth/dev-test/bsp_awe-ti/am275x/audio_app/./am275/common/include/ti_am275_defs.h	2025-11-24 10:23:49.119263487 +0000
@@ -59,7 +59,7 @@
 
 #define C75_0_MSRAM_BASE                (0x80200000)
 #define C75_1_MSRAM_BASE                (0x80400000)
-#define AWE_MSRAM_PRGM_BASE             (0x80300000)
+#define AWE_MSRAM_PRGM_BASE             (0x80450000)
 #define C7_AVB_DATA_BASE                (0x80500000)
 #define C7_MISC_DATA_BASE               (0x80580000)
 
@@ -68,20 +68,25 @@
 
 #define C75_VEC_SIZE                    (0x900)
 #define C75_ENTRY_SIZE                  (0x40)
-#define C75_PGRM_MSRAM_SIZE             (0x70000 - C75_ENTRY_SIZE)
-#define C75_DATA_MSRAM_SIZE             (0x90000)
+#define C75_PGRM_MSRAM_SIZE             (0xC0000 - C75_ENTRY_SIZE)
+#define C75_DATA_MSRAM_SIZE             (0x190000)
 #define C75_L2SRAM_SIZE                 (0x240000)
-#define L2SRAM_SIZE                     (C75_L2SRAM_SIZE - C75_VEC_SIZE)
 #define AWE_PRGM_SIZE                   (0x50000)
 #define AWE_DATA_SIZE                   (0x30000)
 #define AVB_DATA_SIZE                   (0x40000)
 #define SHM_SHARED_HEAP_SIZE            (0x8000)
-#define TUNING_PKT_SIZE     		    (0x00800)  /* 2 kB   */
-#define SHARED_LOG_SIZE     		    (0x4000)   /* 16 kB */
-#define AWE_SLOW_HEAPSIZE               (0x80000 - SHM_SHARED_HEAP_SIZE - TUNING_PKT_SIZE - SHARED_LOG_SIZE)
+#define TUNING_PKT_SIZE     		    (0x00800)   /*   2 kB */
+#define SHARED_LOG_SIZE     		    (0x4000)    /*  16 kB */
+#define C7X_SYSMEM_SIZE                 (0x40000)   /* 128 kB */
+#define AWE_FAST_HEAP_A_SIZE            (0x40000)   /* 256 kB */
+#define AWE_FAST_HEAP_B_SIZE            (0x40000)   /* 256 kB */
+#define AWE_SLOW_HEAP_SIZE              (0x70000)   /* 448 kB */
 
 #define C75_0_VECS_BASE                 (C75_0_L2SRAM_BASE)
-#define C75_0_L2SRAM                    (C75_0_VECS_BASE + C75_VEC_SIZE)
+#define C7X_SYSMEM_BASE                 (C75_0_VECS_BASE + C75_VEC_SIZE)
+#define C7X_SYSMEM_END                  (C7X_SYSMEM_BASE + C7X_SYSMEM_SIZE)
+#define C75_0_L2SRAM                    (C7X_SYSMEM_END)
+#define C75_0_L2SRAM_SIZE               (C75_L2SRAM_SIZE - (C75_VEC_SIZE + C7X_SYSMEM_SIZE + AWE_FAST_HEAP_A_SIZE + AWE_FAST_HEAP_B_SIZE))
 
 #define C75_1_VECS_BASE                 (C75_1_L2SRAM_BASE)
 #define C75_1_L2SRAM                    (C75_1_VECS_BASE + C75_VEC_SIZE)
@@ -102,13 +107,14 @@
 #define C7_TUNING_PKT_BASE              (C7_MISC_DATA_BASE)
 #define C7_SHARED_LOG_BASE              (C7_TUNING_PKT_BASE + TUNING_PKT_SIZE)
 #define SHM_C7C7_HEAP_BASE              (C7_SHARED_LOG_BASE + SHARED_LOG_SIZE)
-#define C7X_SLOWHEAP_BASE               (SHM_C7C7_HEAP_BASE + SHM_SHARED_HEAP_SIZE)
+#define SHM_C7C7_HEAP_END               (SHM_C7C7_HEAP_BASE + SHM_SHARED_HEAP_SIZE)
 
 #define R5_TUNING_PKT_BASE              (R5_MISC_DATA_BASE)
 #define R5_SHARED_LOG_BASE              (R5_TUNING_PKT_BASE  + TUNING_PKT_SIZE)
 
 #define C7_AVB_DATA_RX_BASE             (C7_AVB_DATA_BASE)
 #define C7_AVB_DATA_TX_BASE             (C7_AVB_DATA_BASE + AVB_DATA_SIZE)
+#define C7_AVB_DATA_END                 (C7_AVB_DATA_TX_BASE + AVB_DATA_SIZE)
 
 #define R5_AVB_DATA_RX_BASE             (R5_AVB_DATA_BASE)
 #define R5_AVB_DATA_TX_BASE             (R5_AVB_DATA_BASE + AVB_DATA_SIZE)
@@ -116,6 +122,19 @@
 #define SHM_AVB_DATA_RX_SIZE            (AVB_DATA_SIZE)
 #define SHM_AVB_DATA_TX_SIZE            (AVB_DATA_SIZE)
 
+/* AWE fast heaps placed at the bottom of L2SRAM */
+#define C7X_AWE_FAST_HEAP_A_BASE        (0x7E1C0000)
+#define C7X_AWE_FAST_HEAP_B_BASE        (0x7E200000)
+
+/* AWE slow heap placed at the bottom of MSRAM */
+#define C7X_AWE_SLOW_HEAP_BASE          (SHM_C7C7_HEAP_END)
+#define C7X_AWE_SLOW_HEAP_END           (C7X_AWE_SLOW_HEAP_BASE + AWE_SLOW_HEAP_SIZE)
+
+/* Dirac's DAR data placed immediately after AWE slow heap */
+#define DIRAC_DAR_DATA_BASE             (C75_1_L2SRAM_BASE)
+#define DIRAC_DAR_DATA_SIZE             (0x100000)
+#define DIRAC_DAR_DATA_END              (DIRAC_DAR_DATA_BASE + DIRAC_DAR_DATA_SIZE)
+
 /*------------------ Shared Memory Definition : end ---------------------*/
 
 /* All audio core must notify to gateway (mcu/r5f) */
--- /home/sreekanth/dev/bsp_awe-ti/am275x/audio_app/./common/include/targetInfo.h	2025-11-22 06:31:49.108583233 +0000
+++ /home/sreekanth/dev-test/bsp_awe-ti/am275x/audio_app/./common/include/targetInfo.h	2025-11-22 05:57:31.741837045 +0000
@@ -136,11 +136,11 @@
 #else /* REGRESSION_TEST */
 
 /* Fast Heap */
-#define MASTER_HEAP_SIZE                (270 *1024)
+#define MASTER_HEAP_SIZE                (64  * 1024)
 
 #if (INSTANCE_ID  == TI_AWE_PRIMARY_CORE)
-#define SLOW_HEAP_SIZE                  (16 * 1024)
-#define FASTB_HEAP_SIZE                 (28 * 1024)
+#define FASTB_HEAP_SIZE                 (64  * 1024)
+#define SLOW_HEAP_SIZE                  (112 * 1024)
 
 #else
 /* Secondary C7x - No FastB and Slow heap */