AM62L: Software Reboot stuck for 3-4 minutes on custom board sometimes

Part Number: AM62L

After performing a soft restart, the device will be stuck at the rebooting point for about 3-4 minutes, and the system will automatically return to normal. Please refer to the image below for details;
Not every time it gets stuck,

sdk11.1 in use;

  • Are you testing this on the AM62L EVM or your own custom board?

  • 1. Please share bootlog (Would like to see kernel log and uboot logs)

    2. Confirm if its TI EVM or Custom EVM

    3. Confirm if you are using Oct-10 Release : Ref https://www.ti.com/tool/AM62L-PROCESSOR-SDK 

  • my own custom board

  • 1-see log

    2-my own custom board

    edge-computer login:
    edge-computer login:
    edge-computer login:
    edge-computer login:
    edge-computer login:
    edge-computer login:
    edge-computer login:
    edge-computer login:
    edge-computer login:
    edge-computer login:
    edge-computer login:
    edge-computer login: edge
    Password:
    Linux edge-computer 6.12.43 #9 SMP PREEMPT_RT Wed Oct 15 17:28:10 CST 2025 aarch64
    
    The programs included with the Debian GNU/Linux system are free software;
    the exact distribution terms for each program are described in the
    individual files in /usr/share/doc/*/copyright.
    
    Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
    permitted by applicable law.
    
    sudo -s
    edge@edge-computer:~$
    edge@edge-computer:~$ sudo -s
    [sudo] password for edge:
    root@edge-computer:/home/edge#
    root@edge-computer:/home/edge# reboot
    
    Broadcast message from root@edge-computer on pts/0 (Tue 2025-09-02 12:49:48 UTC):
    
    The system will reboot now!
    
    root@edge-computer:/home/edge#
             Stopping session-2.scope - Session 2 of User edge...
    [  OK  ] Removed slice system-modprobe.slice - Slice /system/modprobe.
    [  OK  ] Stopped target multi-user.target - Multi-User System.
    [  OK  ] Stopped target getty.target - Login Prompts.
    [  OK  ] Stopped target rpcbind.target - RPC Port Mapper.
    [  OK  ] Stopped target timers.target - Timer Units.
    [  OK  ] Stopped dpkg-db-backup.timer - Daily dpkg database backup timer.
    [  OK  ] Stopped e2scrub_all.timer - Period…Metadata Check for All Filesystems.
    [  OK  ] Stopped fake-hwclock-save.timer - Periodically save current clock.
    [  OK  ] Stopped fstrim.timer - Discard unused filesystem blocks once a week.
    [  OK  ] Stopped logrotate.timer - Daily rotation of log files.
    [  OK  ] Stopped man-db.timer - Daily man-db regeneration.
    [  OK  ] Stopped systemd-tmpfiles-clean.tim…y Cleanup of Temporary Directories.
    [  OK  ] Stopped target tpm2.target - Trusted Platform Module.
    [  OK  ] Stopped target usb-gadget.target - Hardware activated USB gadget.
    [  OK  ] Closed systemd-rfkill.socket - Loa…ll Switch Status /dev/rfkill Watch.
             Stopping cron.service - Regular ba…ground program processing daemon...
             Stopping docker.service - Docker Application Container Engine...
             Starting fake-hwclock-save.service - Save the current clock...
    [  OK  ] Stopped ieos_daemon.service - ieos daemon service.
             Stopping nfs-blkmap.service - pNFS block layout mapping daemon...
    [  OK  ] Stopped openvpn.service - OpenVPN service.
             Stopping rsyslog.service - System Logging Service...
             Stopping seatd.service - Seat management daemon...
             Stopping serial-getty@ttyS0.service - Serial Getty on ttyS0...
             Stopping ssh.service - OpenBSD Secure Shell server...
             Stopping systemd-random-seed.service - Load/Save OS Random Seed...
    [  OK  ] Stopped systemd-udev-load-credenti…- Load udev Rules from Credentials.
             Stopping vnstat.service - vnStat network traffic monitor...
    [  OK  ] Stopped nfs-blkmap.service - pNFS block layout mapping daemon.
    [  OK  ] Stopped cron.service - Regular background program processing daemon.
    [  OK  ] Stopped rsyslog.service - System Logging Service.
    [  OK  ] Stopped seatd.service - Seat management daemon.
    [  OK  ] Stopped serial-getty@ttyS0.service - Serial Getty on ttyS0.
    [  OK  ] Stopped vnstat.service - vnStat network traffic monitor.
    [  OK  ] Stopped ssh.service - OpenBSD Secure Shell server.
    [  OK  ] Stopped docker.service - Docker Application Container Engine.
    [  OK  ] Stopped session-2.scope - Session 2 of User edge.
    [  OK  ] Finished fake-hwclock-save.service - Save the current clock.
    [  OK  ] Removed slice system-serial\x2dget…slice - Slice /system/serial-getty.
    [  OK  ] Stopped target network-online.target - Network is Online.
    [  OK  ] Stopped target rpc_pipefs.target.
             Unmounting run-rpc_pipefs.mount - RPC Pipe File System...
             Stopping containerd.service - containerd container runtime...
             Stopping user@1000.service - User Manager for UID 1000...
    [  OK  ] Stopped systemd-random-seed.service - Load/Save OS Random Seed.
    [  OK  ] Stopped containerd.service - containerd container runtime.
    [  OK  ] Unmounted run-rpc_pipefs.mount - RPC Pipe File System.
    [  OK  ] Stopped user@1000.service - User Manager for UID 1000.
             Stopping systemd-user-sessions.service - Permit User Sessions...
             Stopping user-runtime-dir@1000.ser…Runtime Directory /run/user/1000...
    [  OK  ] Unmounted run-user-1000.mount - /run/user/1000.
    [  OK  ] Stopped systemd-user-sessions.service - Permit User Sessions.
    [  OK  ] Stopped user-runtime-dir@1000.serv…r Runtime Directory /run/user/1000.
    [  OK  ] Removed slice user-1000.slice - User Slice of UID 1000.
    [  OK  ] Stopped target network.target - Network.
    [  OK  ] Stopped target remote-fs.target - Remote File Systems.
    [  OK  ] Stopped target remote-fs-pre.targe…reparation for Remote File Systems.
    [  OK  ] Stopped target nfs-client.target - NFS client services.
             Stopping monitor_reset.service - Monitor reset Service...
             Stopping networking.service - Raise network interfaces...
             Stopping systemd-logind.service - User Login Management...
             Stopping watchdog.service - Watchdog Service...
             Stopping wpa_supplicant.service - WPA supplicant...
    [  OK  ] Stopped monitor_reset.service - Monitor reset Service.
    [  OK  ] Stopped systemd-logind.service - User Login Management.
    [  OK  ] Stopped watchdog.service - Watchdog Service.
    [  OK  ] Stopped wpa_supplicant.service - WPA supplicant.
             Stopping dbus.service - D-Bus System Message Bus...
    [  OK  ] Stopped dbus.service - D-Bus System Message Bus.
    [  OK  ] Stopped target basic.target - Basic System.
    [  OK  ] Stopped target paths.target - Path Units.
    [  OK  ] Stopped systemd-ask-password-conso…equests to Console Directory Watch.
    [  OK  ] Stopped systemd-ask-password-wall.…d Requests to Wall Directory Watch.
    [  OK  ] Stopped target slices.target - Slice Units.
    [  OK  ] Removed slice user.slice - User and Session Slice.
    [  OK  ] Stopped target sockets.target - Socket Units.
    [  OK  ] Closed dbus.socket - D-Bus System Message Bus Socket.
    [  OK  ] Closed docker.socket - Docker Socket for the API.
    [  OK  ] Closed pcscd.socket - PC/SC Smart Card Daemon Activation Socket.
    [  OK  ] Closed sshd-unix-local.socket - Op…temd-ssh-generator, AF_UNIX Local).
    [  OK  ] Closed syslog.socket - Syslog Socket.
    [  OK  ] Closed systemd-hostnamed.socket - Hostname Service Socket.
    [  OK  ] Stopped target sysinit.target - System Initialization.
    [  OK  ] Stopped systemd-tmpfiles-setup.ser…reate System Files and Directories.
    [ 3179.858793] am65-cpsw-nuss 8000000.ethernet eth1: Link is Down
    [  OK  ] Stopped networking.service - Raise network interfaces.
    [  OK  ] Stopped target local-fs.target - Local File Systems.
             Unmounting run-lock.mount - Legacy Locks Directory /run/lock...
             Unmounting tmp.mount - Temporary Directory /tmp...
             Unmounting userdata.mount - /userdata...
    [  OK  ] Stopped systemd-sysctl.service - Apply Kernel Variables.
    [  OK  ] Stopped systemd-modules-load.service - Load Kernel Modules.
    [  OK  ] Unmounted run-lock.mount - Legacy Locks Directory /run/lock.
    [  OK  ] Unmounted tmp.mount - Temporary Directory /tmp.
    [  OK  ] Unmounted userdata.mount - /userdata.
    [  OK  ] Stopped target local-fs-pre.target…Preparation for Local File Systems.
    [  OK  ] Stopped target swap.target - Swaps.
    [  OK  ] Reached target umount.target - Unmount All Filesystems.
    [  OK  ] Stopped systemd-remount-fs.service…mount Root and Kernel File Systems.
    [  OK  ] Stopped systemd-tmpfiles-setup-dev…Create Static Device Nodes in /dev.
    [  OK  ] Stopped systemd-tmpfiles-setup-dev…ic Device Nodes in /dev gracefully.
    [  OK  ] Reached target shutdown.target - System Shutdown.
    [  OK  ] Reached target final.target - Late Shutdown Services.
    [  OK  ] Finished systemd-reboot.service - System Reboot.
    [  OK  ] Reached target reboot.target - System Reboot.
    [ 3180.612665] systemd-shutdown[1]: Syncing filesystems and block devices.
    [ 3180.664610] systemd-shutdown[1]: Sending SIGTERM to remaining processes...
    [ 3180.698271] systemd-journald[203]: Received SIGTERM from PID 1 (systemd-shutdow).
    [ 3180.738479] systemd-shutdown[1]: Sending SIGKILL to remaining processes...
    [ 3180.769308] systemd-shutdown[1]: Unmounting file systems.
    [ 3180.781841] (sd-umount)[36617]: Unmounting '/run/credentials/systemd-journald.service'.
    [ 3180.796014] (sd-remount)[36618]: Remounting '/' read-only with options 'lowerdir=/mnt/.ro/kernel:/mnt/.ro/rootfs,upperdir=/userdata/.rw/upper,workdir=/userdata/.rw/work'.
    [ 3180.839228] systemd-shutdown[1]: All filesystems unmounted.
    [ 3180.839252] systemd-shutdown[1]: Deactivating swaps.
    [ 3180.839348] systemd-shutdown[1]: All swaps deactivated.
    [ 3180.839358] systemd-shutdown[1]: Detaching loop devices.
    [ 3180.864417] systemd-shutdown[1]: Detaching loopback /dev/loop0.
    [ 3180.872085] systemd-shutdown[1]: Syncing /dev/loop0.
    [ 3180.879842] systemd-shutdown[1]: Could not detach loopback /dev/loop0: Device or resource busy
    [ 3180.879875] systemd-shutdown[1]: Not all loop devices detached, 1 left.
    [ 3180.879886] systemd-shutdown[1]: Stopping MD devices.
    [ 3180.889341] systemd-shutdown[1]: All MD devices stopped.
    [ 3180.889360] systemd-shutdown[1]: Detaching DM devices.
    [ 3180.913075] systemd-shutdown[1]: Detaching DM /dev/dm-0 (253:0).
    [ 3180.920857] systemd-shutdown[1]: Syncing /dev/dm-0.
    [ 3180.927598] systemd-shutdown[1]: Could not detach DM /dev/dm-0: Device or resource busy
    [ 3180.927628] systemd-shutdown[1]: Not all DM devices detached, 1 left.
    [ 3180.927955] systemd-shutdown[1]: Detaching loop devices.
    [ 3180.951812] systemd-shutdown[1]: Detaching loopback /dev/loop0.
    [ 3180.960397] systemd-shutdown[1]: Syncing /dev/loop0.
    [ 3180.967176] systemd-shutdown[1]: Could not detach loopback /dev/loop0: Device or resource busy
    [ 3180.967209] systemd-shutdown[1]: Not all loop devices detached, 1 left.
    [ 3180.967219] systemd-shutdown[1]: Detaching DM devices.
    [ 3180.989385] systemd-shutdown[1]: Detaching DM /dev/dm-0 (253:0).
    [ 3180.996146] systemd-shutdown[1]: Syncing /dev/dm-0.
    [ 3181.003778] systemd-shutdown[1]: Could not detach DM /dev/dm-0: Device or resource busy
    [ 3181.003810] systemd-shutdown[1]: Not all DM devices detached, 1 left.
    [ 3181.004128] systemd-shutdown[1]: Detaching loop devices.
    [ 3181.028012] systemd-shutdown[1]: Detaching loopback /dev/loop0.
    [ 3181.035789] systemd-shutdown[1]: Syncing /dev/loop0.
    [ 3181.042636] systemd-shutdown[1]: Could not detach loopback /dev/loop0: Device or resource busy
    [ 3181.042667] systemd-shutdown[1]: Not all loop devices detached, 1 left.
    [ 3181.042678] systemd-shutdown[1]: Detaching DM devices.
    [ 3181.058308] systemd-shutdown[1]: Detaching DM /dev/dm-0 (253:0).
    [ 3181.072814] systemd-shutdown[1]: Syncing /dev/dm-0.
    [ 3181.079867] systemd-shutdown[1]: Could not detach DM /dev/dm-0: Device or resource busy
    [ 3181.079899] systemd-shutdown[1]: Not all DM devices detached, 1 left.
    [ 3181.079910] systemd-shutdown[1]: Cannot finalize remaining loop devices, DM devices, continuing.
    [ 3181.080296] systemd-shutdown[1]: Unable to finalize remaining loop devices, DM devices, ignoring.
    [ 3181.113951] systemd-shutdown[1]: Syncing filesystems and block devices.
    [ 3181.123595] systemd-shutdown[1]: Rebooting.
    
    U-Boot SPL 2025.01 (Oct 15 2025 - 09:05:30 +0800)
    DDR:   Auto-detected dGiB
    Trying to boot from eMMC
    
    
    U-Boot 2025.01 (Oct 15 2025 - 09:05:30 +0800)
    
    SoC:   AM62LX SR1.1 HS-FS
    DDR:   Auto-detected 1GiB
    Loading Environment OK
    Verify  GPT: success!
    boot information:
        active slot: A
        max tries  : 3
        slots      :
            slot a : tries=0, success=true , bootable=true
            slot b : tries=0, success=false, bootable=false
        system     :
            reset enable : true
            reset factory: false
    
    62071830 bytes read in 341 ms (173.6 MiB/s)
    ## Loading kernel from FIT Image at 90000000 ...
       Using 'config-1' configuration
       Verifying Hash Integrity ... sha512,rsa4096:custMpk+ OK
       Trying 'kernel-1' kernel subimage
         Description:  Linux kernel
         Created:      2025-10-15   9:31:00 UTC
         Type:         Kernel Image
         Compression:  lz4 compressed
         Data Start:   0x900000c8
         Data Size:    14737279 Bytes = 14.1 MiB
         Architecture: AArch64
         OS:           Linux
         Load Address: 0x82000000
         Entry Point:  0x82000000
         Hash algo:    sha512
         Hash value:   c8d512099098235c7b5cd3faac8e0649b229822320e60450dd88c33ba91406f545645b615dee6b81bf1a8ca98906d1031c85d4be89a12d1883c96232840b425f
       Verifying Hash Integrity ... sha512+ OK
    ## Loading ramdisk from FIT Image at 90000000 ...
       Using 'config-1' configuration
       Verifying Hash Integrity ... sha512,rsa4096:custMpk+ OK
       Trying 'ramdisk-1' ramdisk subimage
         Description:  initramfs
         Created:      2025-10-15   9:31:00 UTC
         Type:         RAMDisk Image
         Compression:  uncompressed
         Data Start:   0x90e19fec
         Data Size:    47282824 Bytes = 45.1 MiB
         Architecture: AArch64
         OS:           Linux
         Load Address: 0x88080000
         Entry Point:  0x88080000
         Hash algo:    sha512
         Hash value:   3281c50f92c6d1117f95400af2d477849075769894e02e3d560ece58113f8112146516da5499ef06b9b6c826cc5065530818fb938717139a6503fa07f54105c4
       Verifying Hash Integrity ... sha512+ OK
       Loading ramdisk from 0x90e19fec to 0x88080000
    ## Loading fdt from FIT Image at 90000000 ...
       Using 'config-1' configuration
       Verifying Hash Integrity ... sha512,rsa4096:custMpk+ OK
       Trying 'fdt-1' fdt subimage
         Description:  Flattened Device Tree blob
         Created:      2025-10-15   9:31:00 UTC
         Type:         Flat Device Tree
         Compression:  uncompressed
         Data Start:   0x90e0e168
         Data Size:    48528 Bytes = 47.4 KiB
         Architecture: AArch64
         Load Address: 0x88000000
         Hash algo:    sha512
         Hash value:   716b1c31e33f01aa23f1f655caa8f3a231c50d8ca4624212ea695bb72b0c5b370afc1d75f45b3f6fbe4ccaeaeeae3bc61e21adddc83d8a2276a8c5acdc7479a4
       Verifying Hash Integrity ... sha512+ OK
       Loading fdt from 0x90e0e168 to 0x88000000
       Booting using the fdt blob at 0x88000000
    Working FDT set to 88000000
       Uncompressing Kernel Image to 82000000
       Loading Ramdisk to 8d2e8000, end 8ffffa88 ... OK
       Loading Device Tree to 000000008d2d9000, end 000000008d2e7d8f ... OK
    Working FDT set to 8d2d9000
    
    Starting kernel ...
    
    [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
    [    0.000000] Linux version 6.12.43 #9 SMP PREEMPT_RT Wed Oct 15 17:28:10 CST 2025
    [    0.000000] Machine model: Texas Instruments AM62L3 Evaluation Module
    [    0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002800000 (options '')
    [    0.000000] printk: legacy bootconsole [ns16550a0] enabled
    [    0.000000] OF: reserved mem: 0x0000000080200000..0x00000000809fffff (8192 KiB) nomap non-reusable optee@80200000
    [    0.000000] OF: reserved mem: 0x0000000080000000..0x00000000801fffff (2048 KiB) nomap non-reusable tfa@80000000
    [    0.000000] Zone ranges:
    [    0.000000]   DMA      [mem 0x0000000080000000-0x00000000bfffffff]
    [    0.000000]   DMA32    empty
    [    0.000000]   Normal   empty
    [    0.000000] Movable zone start for each node
    [    0.000000] Early memory node ranges
    [    0.000000]   node   0: [mem 0x0000000080000000-0x00000000809fffff]
    [    0.000000]   node   0: [mem 0x0000000080a00000-0x00000000bfffffff]
    [    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000000bfffffff]
    [    0.000000] cma: Reserved 32 MiB at 0x00000000bce00000 on node -1
    [    0.000000] psci: probing for conduit method from DT.
    [    0.000000] psci: PSCIv1.1 detected in firmware.
    [    0.000000] psci: Using standard PSCI v0.2 function IDs
    [    0.000000] psci: SMC Calling Convention v1.5
    [    0.000000] percpu: Embedded 34 pages/cpu s100720 r8192 d30352 u139264
    [    0.000000] Detected VIPT I-cache on CPU0
    [    0.000000] CPU features: detected: GIC system register CPU interface
    [    0.000000] CPU features: kernel page table isolation disabled by kernel configuration
    [    0.000000] CPU features: detected: ARM erratum 845719
    [    0.000000] alternatives: applying boot alternatives
    [    0.000000] Kernel command line: console=ttyS0,115200n8 earlycon=ns16550a,mmio32,0x02800000
    [    0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
    [    0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
    [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 262144
    [    0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
    [    0.000000] software IO TLB: SWIOTLB bounce buffer size adjusted to 1MB
    [    0.000000] software IO TLB: area num 1.
    [    0.000000] software IO TLB: mapped [mem 0x00000000bcd00000-0x00000000bce00000] (1MB)
    [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
    [    0.000000] ftrace: allocating 49341 entries in 193 pages
    [    0.000000] ftrace: allocated 193 pages with 3 groups
    [    0.000000] rcu: Preemptible hierarchical RCU implementation.
    [    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=512 to nr_cpu_ids=1.
    [    0.000000] rcu:     RCU_SOFTIRQ processing moved to rcuc kthreads.
    [    0.000000]  No expedited grace period (rcu_normal_after_boot).
    [    0.000000]  Trampoline variant of Tasks RCU enabled.
    [    0.000000]  Rude variant of Tasks RCU enabled.
    [    0.000000]  Tracing variant of Tasks RCU enabled.
    [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 100 jiffies.
    [    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
    [    0.000000] RCU Tasks: Setting shift to 0 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=1.
    [    0.000000] RCU Tasks Rude: Setting shift to 0 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=1.
    [    0.000000] RCU Tasks Trace: Setting shift to 0 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=1.
    [    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
    [    0.000000] GICv3: GIC: Using split EOI/Deactivate mode
    [    0.000000] GICv3: 960 SPIs implemented
    [    0.000000] GICv3: 0 Extended SPIs implemented
    [    0.000000] Root IRQ handler: gic_handle_irq
    [    0.000000] GICv3: GICv3 features: 16 PPIs
    [    0.000000] GICv3: GICD_CTRL.DS=0, SCR_EL3.FIQ=0
    [    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000001840000
    [    0.000000] ITS [mem 0x01820000-0x0182ffff]
    [    0.000000] GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS
    [    0.000000] ITS@0x0000000001820000: Devices Table too large, reduce ids 20->19
    [    0.000000] ITS@0x0000000001820000: allocated 524288 Devices @81400000 (flat, esz 8, psz 64K, shr 0)
    [    0.000000] ITS: using cache flushing for cmd queue
    [    0.000000] GICv3: using LPI property table @0x0000000080d90000
    [    0.000000] GIC: using cache flushing for LPI property table
    [    0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000080da0000
    [    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
    [    0.000000] arch_timer: cp15 timer(s) running at 200.00MHz (phys).
    [    0.000000] clocksource: arch_sys_counter: mask: 0x3ffffffffffffff max_cycles: 0x2e2049d3e8, max_idle_ns: 440795210634 ns
    [    0.000001] sched_clock: 58 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
    [    0.000411] Console: colour dummy device 80x25
    [    0.000473] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=200000)
    [    0.000486] pid_max: default: 32768 minimum: 301
    [    0.000578] LSM: initializing lsm=capability
    [    0.000723] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
    [    0.000736] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
    [    0.009556] rcu: Hierarchical SRCU implementation.
    [    0.009568] rcu:     Max phase no-delay instances is 400.
    [    0.047996] smp: Bringing up secondary CPUs ...
    [    0.048031] smp: Brought up 1 node, 1 CPU
    [    0.048037] SMP: Total of 1 processors activated.
    [    0.048040] CPU: All CPU(s) started at EL2
    [    0.048047] CPU features: detected: 32-bit EL0 Support
    [    0.048054] CPU features: detected: CRC32 instructions
    [    0.048095] alternatives: applying system-wide alternatives
    [    0.049563] Memory: 903568K/1048576K available (14912K kernel code, 2424K rwdata, 4464K rodata, 5248K init, 639K bss, 103724K reserved, 32768K cma-reserved)
    [    0.120549] devtmpfs: initialized
    [    0.553846] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns
    [    0.553872] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
    [    0.572021] 25792 pages in range for non-PLT usage
    [    0.572041] 517312 pages in range for PLT usage
    [    0.577302] pinctrl core: initialized pinctrl subsystem
    [    0.589973] NET: Registered PF_NETLINK/PF_ROUTE protocol family
    [    0.597550] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
    [    0.605761] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
    [    0.614986] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
    [    0.615116] audit: initializing netlink subsys (disabled)
    [    0.629099] audit: type=2000 audit(0.612:1): state=initialized audit_enabled=0 res=1
    [    0.637676] thermal_sys: Registered thermal governor 'step_wise'
    [    0.637729] cpuidle: using governor menu
    [    0.637943] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
    [    0.637980] ASID allocator initialised with 65536 entries
    [    0.666824] /bus@f0000/interrupt-controller@1800000: Fixed dependency cycle(s) with /bus@f0000/interrupt-controller@1800000
    [    0.666932] /bus@f0000/dwc3-usb@f900000/usb@31000000: Fixed dependency cycle(s) with /bus@f0000/i2c@20020000/typec-portc@22/connector
    [    0.667029] /bus@f0000/i2c@20020000/typec-portc@22/connector: Fixed dependency cycle(s) with /bus@f0000/dwc3-usb@f900000/usb@31000000
    [    0.705996] /bus@f0000/dwc3-usb@f900000/usb@31000000: Fixed dependency cycle(s) with /bus@f0000/i2c@20020000/typec-portc@22/connector
    [    0.706992] /bus@f0000/i2c@20020000/typec-portc@22/connector: Fixed dependency cycle(s) with /bus@f0000/dwc3-usb@f900000/usb@31000000
    [    0.737777] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
    [    0.737793] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
    [    0.737798] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
    [    0.737801] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
    [    0.737805] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
    [    0.737808] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
    [    0.737812] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
    [    0.737815] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
    [    0.794077] k3-chipinfo 43000014.chipid: Family:AM62LX rev:SR1.1 JTAGID[0x1bba702f] Detected
    [    0.806802] iommu: Default domain type: Translated
    [    0.806817] iommu: DMA domain TLB invalidation policy: strict mode
    [    0.807263] SCSI subsystem initialized
    [    0.807514] usbcore: registered new interface driver usbfs
    [    0.807560] usbcore: registered new interface driver hub
    [    0.807597] usbcore: registered new device driver usb
    [    0.840513] pps_core: LinuxPPS API ver. 1 registered
    [    0.840523] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
    [    0.840537] PTP clock support registered
    [    0.840580] EDAC MC: Ver: 3.0.0
    [    0.863738] scmi_core: SCMI protocol bus registered
    [    0.869204] FPGA manager framework
    [    0.875317] Bluetooth: Core ver 2.22
    [    0.875387] NET: Registered PF_BLUETOOTH protocol family
    [    0.875391] Bluetooth: HCI device and connection manager initialized
    [    0.875409] Bluetooth: HCI socket layer initialized
    [    0.875422] Bluetooth: L2CAP socket layer initialized
    [    0.875440] Bluetooth: SCO socket layer initialized
    [    0.875525] NetLabel: Initializing
    [    0.875528] NetLabel:  domain hash size = 128
    [    0.875531] NetLabel:  protocols = UNLABELED CIPSOv4 CALIPSO
    [    0.875599] NetLabel:  unlabeled traffic allowed by default
    [    0.876027] clocksource: Switched to clocksource arch_sys_counter
    [    0.925310] VFS: Disk quotas dquot_6.6.0
    [    0.925339] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
    [    0.959436] NET: Registered PF_INET protocol family
    [    0.959635] IP idents hash table entries: 16384 (order: 5, 131072 bytes, linear)
    [    0.975392] tcp_listen_portaddr_hash hash table entries: 512 (order: 2, 20480 bytes, linear)
    [    0.975436] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
    [    0.975448] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
    [    0.975575] TCP bind hash table entries: 8192 (order: 7, 655360 bytes, linear)
    [    1.009321] TCP: Hash tables configured (established 8192 bind 8192)
    [    1.009534] UDP hash table entries: 512 (order: 3, 49152 bytes, linear)
    [    1.009609] UDP-Lite hash table entries: 512 (order: 3, 49152 bytes, linear)
    [    1.009938] NET: Registered PF_UNIX/PF_LOCAL protocol family
    [    1.039803] Unpacking initramfs...
    [    1.048050] Initialise system trusted keyrings
    [    1.053811] workingset: timestamp_bits=46 max_order=18 bucket_order=0
    [    1.224540] Key type asymmetric registered
    [    1.224563] Asymmetric key parser 'x509' registered
    [    1.224707] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 246)
    [    1.224714] io scheduler mq-deadline registered
    [    1.224718] io scheduler kyber registered
    [    1.224773] io scheduler bfq registered
    [    1.263585] pinctrl-single 4084000.pinctrl: 147 pins, size 588
    [    1.281283] ti-udma-am62l 485c4000.dma-controller: Number of rings: 144
    [    1.281387] ti-udma-am62l 485c4000.dma-controller: Channels: 144 (bchan: 16, tchan + rchan: 128)
    [    1.318819] ti-udma-am62l 485c0000.dma-controller: Number of rings: 112
    [    1.318908] ti-udma-am62l 485c0000.dma-controller: Channels: 97 (tchan + rchan: 97)
    [    1.362220] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
    [    1.394680] loop: module loaded
    [    1.406210] wireguard: WireGuard 1.0.0 loaded. See www.wireguard.com for information.
    [    1.406225] wireguard: Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
    [    1.426914] tun: Universal TUN/TAP device driver, 1.6
    [    1.433414] vcan: Virtual CAN interface driver
    [    1.433432] vxcan: Virtual CAN Tunnel driver
    [    1.433438] CAN device driver interface
    [    1.448704] PPP generic driver version 2.4.2
    [    1.453620] PPP BSD Compression module registered
    [    1.453631] PPP Deflate Compression module registered
    [    1.453667] PPP MPPE Compression module registered
    [    1.453673] NET: Registered PF_PPPOX protocol family
    [    1.475479] VFIO - User Level meta-driver version: 0.3
    [    1.486585] usbcore: registered new device driver onboard-usb-dev
    [    1.495556] i2c_dev: i2c /dev entries driver
    [    1.503100] device-mapper: ioctl: 4.48.0-ioctl (2023-03-01) initialised: dm-devel@lists.linux.dev
    [    1.503288] Bluetooth: HCI UART driver ver 2.2.09aeb7c.20230313-112554
    [    1.503297] Bluetooth: HCI H4 protocol initialized
    [    1.503301] Bluetooth: HCI Realtek H5 protocol initialized
    [    1.503304] rtk_btcoex: rtk_btcoex_init: version: 1.2
    [    1.503308] rtk_btcoex: create workqueue
    [    1.503530] rtk_btcoex: alloc buffers 1792, 2432 for ev and l2
    [    1.546776] sdhci: Secure Digital Host Controller Interface driver
    [    1.546788] sdhci: Copyright(c) Pierre Ossman
    [    1.559395] sdhci-pltfm: SDHCI platform and OF driver helper
    [    1.572659] arm-scmi arm-scmi.0.auto: Using scmi_smc_transport
    [    1.572681] arm-scmi arm-scmi.0.auto: SCMI max-rx-timeout: 30ms
    [    1.572926] scmi_protocol scmi_dev.1: Enabled polling mode TX channel - prot_id:16
    [    1.594531] arm-scmi arm-scmi.0.auto: SCMI Notifications - Core Enabled.
    [    1.594608] arm-scmi arm-scmi.0.auto: SCMI Protocol v2.0 'TI:' Firmware version 0x0
    [    1.686930] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 (0,8000003f) counters available
    [    1.703584] xt_time: kernel timezone is -0000
    [    1.703868] Initializing XFRM netlink socket
    [    1.703995] NET: Registered PF_INET6 protocol family
    [    1.722688] Segment Routing with IPv6
    [    1.722743] In-situ OAM (IOAM) with IPv6
    [    1.722865] NET: Registered PF_PACKET protocol family
    [    1.722880] NET: Registered PF_KEY protocol family
    [    1.722934] Bridge firewalling registered
    [    1.722940] can: controller area network core
    [    1.722990] NET: Registered PF_CAN protocol family
    [    1.722995] can: raw protocol
    [    1.723001] can: broadcast manager protocol
    [    1.762653] can: netlink gateway - max_hops=1
    [    1.762711] can: SAE J1939
    [    1.762718] can: isotp protocol (max_pdu_size 8300)
    [    1.762902] Bluetooth: RFCOMM TTY layer initialized
    [    1.762920] Bluetooth: RFCOMM socket layer initialized
    [    1.762960] Bluetooth: RFCOMM ver 1.11
    [    1.762983] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
    [    1.762987] Bluetooth: BNEP filters: protocol multicast
    [    1.762996] Bluetooth: BNEP socket layer initialized
    [    1.762999] 8021q: 802.1Q VLAN Support v1.8
    [    1.836553] Loading compiled-in X.509 certificates
    [    2.012115] omap_i2c 2b200000.i2c: bus 3 rev0.12 at 400 kHz
    [    2.035574] rtc-pcf8563 0-0051: registered as rtc0
    [    2.042491] omap_i2c 20000000.i2c: bus 0 rev0.12 at 400 kHz
    [    2.052255] omap_i2c 20010000.i2c: bus 1 rev0.12 at 100 kHz
    [    2.062318] /bus@f0000/i2c@20020000/typec-portc@22/connector: Fixed dependency cycle(s) with /bus@f0000/dwc3-usb@f900000/usb@31000000
    [    2.062519] omap_i2c 20020000.i2c: bus 2 rev0.12 at 100 kHz
    [    2.491037] Freeing initrd memory: 46172K
    [    2.504932] printk: legacy console [ttyS0] disabled
    [    2.512166] 2800000.serial: ttyS0 at MMIO 0x2800000 (irq = 279, base_baud = 3000000) is a 8250
    [    2.522151] printk: legacy console [ttyS0] enabled
    [    2.522151] printk: legacy console [ttyS0] enabled
    [    2.522167] printk: legacy bootconsole [ns16550a0] disabled
    [    2.522167] printk: legacy bootconsole [ns16550a0] disabled
    [    2.552665] 2810000.serial: ttyS1 at MMIO 0x2810000 (irq = 280, base_baud = 3000000) is a 8250
    [    2.564535] 2840000.serial: ttyS2 at MMIO 0x2840000 (irq = 281, base_baud = 3000000) is a 8250
    [    2.575736] 2860000.serial: ttyS3 at MMIO 0x2860000 (irq = 282, base_baud = 3000000) is a 8250
    [    2.587747] am65-cpsw-nuss 8000000.ethernet: initializing am65 cpsw nuss version 0x6BA00103, cpsw version 0x6BA80103 Ports: 3 quirks:00000006
    [    2.601193] am65-cpsw-nuss 8000000.ethernet: Use random MAC address
    [    2.641068] davinci_mdio 8000f00.mdio: davinci mdio revision 17.7, bus freq 1000000
    [    2.678661] davinci_mdio 8000f00.mdio: phy[4]: device 8000f00.mdio:04, driver Micrel KSZ8081 or KSZ8091
    [    2.678681] davinci_mdio 8000f00.mdio: phy[7]: device 8000f00.mdio:07, driver Micrel KSZ8081 or KSZ8091
    [    2.680061] am65-cpsw-nuss 8000000.ethernet: initialized cpsw ale version 1.5
    [    2.680075] am65-cpsw-nuss 8000000.ethernet: ALE Table size 512, Policers 32
    [    2.712640] am65-cpsw-nuss 8000000.ethernet: CPTS ver 0x4e8a010d, freq:200000000, add_val:4 pps:0
    [    2.742233] am65-cpsw-nuss 8000000.ethernet: set new flow-id-base 96
    [    2.753784] /bus@f0000/i2c@20020000/typec-portc@22/connector: Fixed dependency cycle(s) with /bus@f0000/dwc3-usb@f900000/usb@31000000
    [    2.753977] /bus@f0000/dwc3-usb@f900000/usb@31000000: Fixed dependency cycle(s) with /bus@f0000/i2c@20020000/typec-portc@22/connector
    [    2.785535] xhci-hcd xhci-hcd.4.auto: xHCI Host Controller
    [    2.791659] xhci-hcd xhci-hcd.4.auto: new USB bus registered, assigned bus number 1
    [    2.791833] xhci-hcd xhci-hcd.4.auto: USB3 root hub has no ports
    [    2.791840] xhci-hcd xhci-hcd.4.auto: hcc params 0x0258fe6d hci version 0x110 quirks 0x0000808020000010
    [    2.800080] xhci-hcd xhci-hcd.4.auto: irq 295, io mem 0x31100000
    [    2.821352] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 6.12
    [    2.821361] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
    [    2.821368] usb usb1: Product: xHCI Host Controller
    [    2.821372] usb usb1: Manufacturer: Linux 6.12.43 xhci-hcd
    [    2.821377] usb usb1: SerialNumber: xhci-hcd.4.auto
    [    2.836138] hub 1-0:1.0: USB hub found
    [    2.850021] hub 1-0:1.0: 1 port detected
    [    2.867180] mmc0: CQHCI version 5.10
    [    2.867725] mmc1: CQHCI version 5.10
    [    2.877164] mmc2: CQHCI version 5.10
    [    2.885332] cfg80211: Loading compiled-in X.509 certificates for regulatory database
    [    2.926053] mmc0: SDHCI controller on fa10000.mmc [fa10000.mmc] using ADMA 64-bit
    [    2.931448] mmc2: SDHCI controller on fa20000.mmc [fa20000.mmc] using ADMA 64-bit
    [    2.949173] Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
    [    2.949976] Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
    [    2.964217] clk: Disabling unused clocks
    [    2.974710] PM: genpd: Disabling unused power domains
    [    3.009200] mmc0: Command Queue Engine enabled
    [    3.009235] mmc0: new HS200 MMC card at address 0001
    [    3.019633] mmcblk0: mmc0:0001 BUTC42 29.1 GiB
    [    3.027602]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10
    [    3.034771] mmcblk0boot0: mmc0:0001 BUTC42 4.00 MiB
    [    3.041437] mmcblk0boot1: mmc0:0001 BUTC42 4.00 MiB
    [    3.047457] mmcblk0rpmb: mmc0:0001 BUTC42 16.0 MiB, chardev (238:0)
    [    3.124964] mmc2: Failed to initialize a non-removable card
    [    4.447669] mmc1: SDHCI controller on fa00000.mmc [fa00000.mmc] using ADMA 64-bit
    [    4.467239] Freeing unused kernel memory: 5248K
    [    4.467540] Run /init as init process
    [    4.553373] EXT4-fs (mmcblk0p2): mounted filesystem e45238ae-71ef-45fd-968c-edf250455de6 r/w without journal. Quota mode: none.
    [    4.586693] EXT4-fs (mmcblk0p2): unmounting filesystem e45238ae-71ef-45fd-968c-edf250455de6.
    [    4.611233] EXT4-fs (mmcblk0p4): mounted filesystem cbd3a187-ee44-4f89-8056-f94ba0bc6fb5 ro with ordered data mode. Quota mode: none.
    [    4.620000] mount kernel /dev/mmcblk0p4 successful
    [    4.658779] loop0: detected capacity change from 0 to 46968
    [    4.666216] device-mapper: verity: sha512 using shash "sha512-generic"
    [    4.696946] EXT4-fs (dm-0): mounted filesystem f0d6256d-c35c-4dba-abee-a78ceab3f295 ro with ordered data mode. Quota mode: none.
    [    4.700000] mount rootfs /dev/mmcblk0p5 successful
    [    5.796565] EXT4-fs (mmcblk0p10): mounted filesystem 18b3563a-1dd2-11b2-a774-8d328a4694e7 r/w with ordered data mode. Quota mode: none.
    [    5.810000] mount userdata /dev/mmcblk0p10 successful
    [    5.840000] mount overlayfs successful
    Start EC init ...
    [    8.535756] success
    [    8.787751] systemd[1]: System time advanced to built-in epoch: Wed 2025-06-25 12:40:07 UTC
    [    8.854210] systemd[1]: systemd 257.7-1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +IPE +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBCRYPTSETUP_PLUGINS +LIBFDISK +PCRE2 +PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD +BPF_FRAMEWORK +BTF -XKBCOMMON -UTMP +SYSVINIT +LIBARCHIVE)
    [    8.854252] systemd[1]: Detected architecture arm64.
    
    Welcome to Debian GNU/Linux 13 (trixie)!
    
    [    8.911466] systemd[1]: Hostname set to <edge-computer>.
    [    9.293324] systemd[1]: bpf-restrict-fs: BPF LSM hook not enabled in the kernel, BPF LSM not supported.
    [   10.564825] systemd[1]: Queued start job for default target multi-user.target.
    [   10.586438] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
    [  OK  ] Created slice system-modprobe.slice - Slice /system/modprobe.
    [  OK  ] Created slice system-serial\x2dget▒[   10.607565] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
    ▒▒slice - Slice /system/serial-getty.
    [   10.629768] systemd[1]: Created slice user.slice - User and Session Slice.
    [  OK  ] Created slice user.slice - User and Session Slice.
    [   10.646773] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
    [  OK  ] Started systemd-ask-password-conso…equests to Console Directory Watch.
    [  OK  ] Started systemd-ask-password-wall.▒[   10.669731] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
    ▒▒d Requests to Wall Directory Watch.
             Expecting device dev-ttyS0.device - /dev/t[   10.691571] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
    [   10.691737] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
    
    [  OK  ] Reached target paths.target - P[   10.726495] systemd[1]: Reached target paths.target - Path Units.
    ath Units.
    [  OK  ] Reached target slices.target - [   10.740461] systemd[1]: Reached target slices.target - Slice Units.
    Slice Units.
    [  OK  ] Reached target swap.target - Sw[   10.754417] systemd[1]: Reached target swap.target - Swaps.
    aps.
    [   10.801933] systemd[1]: Listening on rpcbind.socket - RPCbind Server Activation Socket.
    [  OK  ] Listening on rpcbind.socket - RPCbind Server Activation Socket.
    [  OK  ] Listening on syslog.socket - Sy[   10.821310] systemd[1]: Listening on syslog.socket - Syslog Socket.
    slog Socket.
    [  OK  ] Listening on systemd-creds.socket   10.841630] systemd[1]: Listening on systemd-creds.socket - Credential Encryption/Decryption.
    0m - Credential Encryption/Decryption.
    [  OK  ] Listening on systemd-initctl.socke▒[   10.861996] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
    ▒▒- initctl Compatibility Named Pipe.
    [  OK  ] Listening on systemd-journald-dev-▒[   10.883102] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
    ▒▒socket - Journal Socket (/dev/log).
    [  OK  ] Listening on systemd-journald.socke[   10.904267] systemd[1]: Listening on systemd-journald.socket - Journal Sockets.
    t - Journal Sockets.
    [   10.921504] systemd[1]: systemd-pcrextend.socket - TPM PCR Measurements was skipped because of an unmet condition check (ConditionSecurity=measured-uki).
    [   10.921610] systemd[1]: systemd-pcrlock.socket - Make TPM PCR Policy was skipped because of an unmet condition check (ConditionSecurity=measured-uki).
    [   10.923574] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
    [  OK  ] Listening on systemd-udevd-control.socket - udev Control Socket.
    [   10.967882] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
    [  OK  ] Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
    [   10.992980] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
             Mounting dev-mqueue.mount - POSIX Message Queue File System...
    [   11.009820] systemd[1]: run-lock.mount: Directory /run/lock to mount over is not empty, mounting anyway.
             Mounting run-lock.mount - Legacy Locks Dir[   11.032330] systemd[1]: Mounting run-lock.mount - Legacy Locks Directory /run/lock...
    ectory /run/lock...
    [   11.068799] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
             Mounting sys-kernel-debug.mount - Kernel Debug File System...
             Mounting sys-kernel-tracing.mount - Kernel[   11.111678] systemd[1]: Mounting sys-kernel-tracing.mount - Kernel Trace File System...
     Trace File System...
             Mounting tmp.mount - Temporary Directory /[   11.181234] systemd[1]: Mounting tmp.mount - Temporary Directory /tmp...
    tmp...
    [   11.199679] systemd[1]: auth-rpcgss-module.service - Kernel Module supporting RPCSEC_GSS was skipped because of an unmet condition check (ConditionPathExists=/etc/krb5.keytab).
    [   11.263874] systemd[1]: Starting fake-hwclock-load.service - Restore the current clock...
             Starting fake-hwclock-load.service - Restore the current clock...
             Starting kmod-static-nodes.service…eate [   11.342205] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
    List of Static Device Nodes...
             Starting modprobe@configfs.service - Load [   11.391103] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
    Kernel Module configfs...
    [   11.439859] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
             Starting modprobe@efi_pstore.servi… - Load Kernel Module efi_pstore...
    [   11.462865] systemd[1]: systemd-hibernate-clear.service - Clear Stale Hibernate Storage Info was skipped because of an unmet condition check (ConditionPathExists=/sys/firmware/efi/efivars/HibernateLocation-8cf2644b-4b0b-428f-9387-6d876050dc67).
    [   11.514954] systemd[1]: Starting systemd-journald.service - Journal Service...
             Starting systemd-journald.service - Journal Service...
             Starting systemd-modules-load.service - Lo[   11.574720] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
    ad Kernel Modules...
    [   11.592390] systemd[1]: systemd-pcrmachine.service - TPM PCR Machine ID Measurement was skipped because of an unmet condition check (ConditionSecurity=measured-uki).
             Starting systemd-remount-fs.servic…unt R[   11.639645] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
    oot and Kernel File Systems...
    [   11.659729] systemd[1]: systemd-tpm2-setup-early.service - Early TPM SRK Setup was skipped because of an unmet condition check (ConditionSecurity=measured-uki).
             Starting systemd-udev-load-credent…Load [   11.697613] systemd[1]: Starting systemd-udev-load-credentials.service - Load udev Rules from Credentials...
    udev Rules from Credentials...
             Starting systemd-udev-trigger.service - Co[   11.740723] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
    ldplug All udev Devices...
    [  OK  ] Mounted dev-mqueue.mount - POSI[   11.789643] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
    X Message Queue File System.
    [  OK  ] Mounted sys-kernel-debug.mount [   11.809662] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
    - Kernel Debug File System.
    [  OK  ] Mounted sys-kernel-tracing.mount   11.829613] systemd[1]: Mounted sys-kernel-tracing.mount - Kernel Trace File System.
    m - Kernel Trace File System.
    [   11.851799] systemd[1]: Mounted run-lock.mount - Legacy Locks Directory /run/lock.
    [  OK  ] Mounted run-lock.mount - Legacy Locks Directory /run/lock.
    [   12.139877] systemd[1]: Mounted tmp.mount - Temporary Directory /tmp.
    [  OK  ] Mounted tmp.mount - Temporary Directory /tmp.
    [  OK  ] Finished kmod-static-nodes.service systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
    [0m…Create List of Static Device Nodes.
    [   12.346938] systemd[1]: Starting systemd-tmpfiles-setup-dev-early.service - Create Static Device Nodes in /dev gracefully...
             Starting systemd-tmpfiles-setup-de… Device Nodes in /dev gracefully...
    [   12.408937] systemd[1]: fake-hwclock-load.service: Deactivated successfully.
    [  OK  ] Finished fake-hwclock-load.service systemd[1]: Finished fake-hwclock-load.service - Restore the current clock.
    [0m - Restore the current clock.
    [  OK  ] Finished systemd-remount-fs.servic▒[   12.697461] systemd[1]: Finished systemd-remount-fs.service - Remount Root and Kernel File Systems.
    ▒▒mount Root and Kernel File Systems.
    [  OK  ] Finished systemd-modules-load.servi[   12.725457] systemd[1]: Finished systemd-modules-load.service - Load Kernel Modules.
    ce - Load Kernel Modules.
    [   12.754505] systemd[1]: systemd-hwdb-update.service - Rebuild Hardware Database was skipped because of an unmet condition check (ConditionNeedsUpdate=/etc).
             Starting systemd-random-seed.service - Loa[   12.789714] systemd[1]: Starting systemd-random-seed.service - Load/Save OS Random Seed...
    d/Save OS Random Seed...
             Starting systemd-sysctl.service - Apply Ke[   12.827722] systemd[1]: Starting systemd-sysctl.service - Apply Kernel Variables...
    rnel Variables...
    [   12.845668] systemd[1]: systemd-tpm2-setup.service - TPM SRK Setup was skipped because of an unmet condition check (ConditionSecurity=measured-uki).
    [   12.905748] systemd[1]: Finished systemd-udev-load-credentials.service - Load udev Rules from Credentials.
    [  OK  ] Finished systemd-udev-load-credent▒[   12.918846] systemd-journald[205]: Collecting audit messages is disabled.
    ▒▒- Load udev Rules from Credentials.
    [   12.952471] systemd[1]: modprobe@efi_pstore.service: Deactivated successfully.
    [   12.962926] systemd[1]: Finished modprobe@efi_pstore.service - Load Kernel Module efi_pstore.
    [  OK  ] Finished modprobe@efi_pstore.service - Load Kernel Module efi_pstore.
    [   12.985603] systemd[1]: systemd-pstore.service - Platform Persistent Storage Archival was skipped because of an unmet condition check (ConditionDirectoryNotEmpty=/sys/fs/pstore).
    [   13.033807] systemd[1]: modprobe@configfs.service: Deactivated successfully.
    [  OK  ] Finished modprobe@configfs.service systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
    [0m - Load Kernel Module configfs.
             Mounting sys-kernel-config.mount - Kernel [   13.079632] systemd[1]: Mounting sys-kernel-config.mount - Kernel Configuration File System...
    Configuration File System...
    [   13.237902] systemd[1]: Mounted sys-kernel-config.mount - Kernel Configuration File System.
    [  OK  ] Mounted sys-kernel-config.mount - Kernel Configuration File System.
    [  OK  ] Finished systemd-tmpfiles-setup-de▒[   13.622586] systemd[1]: Finished systemd-tmpfiles-setup-dev-early.service - Create Static Device Nodes in /dev gracefully.
    ▒▒ic Device Nodes in /dev gracefully.
    [   13.654342] systemd[1]: systemd-sysusers.service - Create System Users was skipped because no trigger condition checks were met.
             Starting systemd-tmpfiles-setup-de…eate [   13.683603] systemd[1]: Starting systemd-tmpfiles-setup-dev.service - Create Static Device Nodes in /dev...
    Static Device Nodes in /dev...
    [  OK  ] Finished systemd-sysctl.service[   13.721235] systemd[1]: Finished systemd-sysctl.service - Apply Kernel Variables.
     - Apply Kernel Variables.
    [   13.741964] systemd[1]: Started systemd-journald.service - Journal Service.
    [  OK  ] Started systemd-journald.service - Journal Service.
             Starting systemd-journal-flush.ser…sh Journal to Persistent Storage...
    [   13.908126] random: crng init done
    [  OK  ] Finished systemd-random-seed.service - Load/Save OS Random Seed.
    [   14.252566] systemd-journald[205]: Received client request to flush runtime journal.
    [  OK  ] Finished systemd-tmpfiles-setup-de…Create Static Device Nodes in /dev.
    [   14.332230] systemd-journald[205]: /var/log/journal/40818d49815140cabe410ee8617659d0/system.journal: Realtime clock jumped backwards relative to last journal entry, rotating.
    [   14.332259] systemd-journald[205]: Rotating system journal.
    [  OK  ] Reached target local-fs-pre.target…Preparation for Local File Systems.
    [  OK  ] Reached target local-fs.target - Local File Systems.
    [  OK  ] Listening on systemd-sysext.socket… System Extension Image Management.
             Starting console-setup.service - Set console font and keymap...
             Starting systemd-udevd.service - R…ager for Device Events and Files...
    [  OK  ] Finished console-setup.service - Set console font and keymap.
    [  OK  ] Started systemd-udevd.service - Ru…anager for Device Events and Files.
    [  OK  ] Finished systemd-journal-flush.ser…lush Journal to Persistent Storage.
             Starting systemd-tmpfiles-setup.se…ate System Files and Directories...
    [  OK  ] Finished systemd-tmpfiles-setup.se…reate System Files and Directories.
             Mounting run-rpc_pipefs.mount - RPC Pipe File System...
             Starting rpcbind.service - RPC bind portmap service...
    [   16.429902] RPC: Registered named UNIX socket transport module.
    [   16.429918] RPC: Registered udp transport module.
    [   16.429921] RPC: Registered tcp transport module.
    [   16.429924] RPC: Registered tcp-with-tls transport module.
    [   16.429927] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [  OK  ] Mounted run-rpc_pipefs.mount - RPC Pipe File System.
    [  OK  ] Started rpcbind.service - RPC bind portmap service.
    [  OK  ] Reached target rpc_pipefs.target.
    [  OK  ] Reached target rpcbind.target - RPC Port Mapper.
             Starting nfs-blkmap.service - pNFS block layout mapping daemon...
    [  OK  ] Reached target nfs-client.target - NFS client services.
    [  OK  ] Reached target remote-fs-pre.targe…reparation for Remote File Systems.
    [  OK  ] Reached target remote-fs.target - Remote File Systems.
    [  OK  ] Finished systemd-udev-trigger.service - Coldplug All udev Devices.
    [  OK  ] Reached target sysinit.target - System Initialization.
    [  OK  ] Started dpkg-db-backup.timer - Daily dpkg database backup timer.
    [  OK  ] Started e2scrub_all.timer - Period…Metadata Check for All Filesystems.
    [  OK  ] Started fake-hwclock-save.timer - Periodically save current clock.
    [  OK  ] Started fstrim.timer - Discard unused filesystem blocks once a week.
    [  OK  ] Started logrotate.timer - Daily rotation of log files.
    [  OK  ] Started man-db.timer - Daily man-db regeneration.
    [  OK  ] Started systemd-tmpfiles-clean.tim…y Cleanup of Temporary Directories.
    [  OK  ] Reached target timers.target - Timer Units.
    [  OK  ] Listening on dbus.socket - D-Bus System Message Bus Socket.
             Starting docker.socket - Docker Socket for the API...
    [  OK  ] Listening on pcscd.socket - PC/SC Smart Card Daemon Activation Socket.
    [  OK  ] Listening on sshd-unix-local.socke…temd-ssh-generator, AF_UNIX Local).
    [  OK  ] Listening on systemd-hostnamed.socket - Hostname Service Socket.
             Starting ifupdown-pre.service - He…synchronize boot up for ifupdown...
    [  OK  ] Started nfs-blkmap.service - pNFS block layout mapping daemon.
    [  OK  ] Listening on docker.socket - Docker Socket for the API.
    [  OK  ] Reached target sockets.target - Socket Units.
    [  OK  ] Reached target basic.target - Basic System.
    [  OK  ] Started cron.service - Regular background program processing daemon.
             Starting dbus.service - D-Bus System Message Bus...
             Starting e2scrub_reap.service - Re…ne ext4 Metadata Check Snapshots...
    [  OK  ] Started monitor_reset.service - Monitor reset Service.
             Starting rsyslog.service - System Logging Service...
    [  OK  ] Started seatd.service - Seat management daemon.
             Starting systemd-logind.service - User Login Management...
    [  OK  ] Started watchdog.service - Watchdog Service.
    [   18.009295] EXT4-fs (mmcblk0p2): mounted filesystem e45238ae-71ef-45fd-968c-edf250455de6 r/w without journal. Quota mode: none.
    [   18.059345] EXT4-fs (mmcblk0p2): unmounting filesystem e45238ae-71ef-45fd-968c-edf250455de6.
    [  OK  ] Started dbus.service - D-Bus System Message Bus.
             Starting wpa_supplicant.service - WPA supplicant...
    [  OK  ] Finished e2scrub_reap.service - Re…line ext4 Metadata Check Snapshots.
    [  OK  ] Found device dev-ttyS0.device - /dev/ttyS0.
    [  OK  ] Started wpa_supplicant.service - WPA supplicant.
    [  OK  ] Started rsyslog.service - System Logging Service.
    [  OK  ] Started systemd-logind.service - User Login Management.
    [   21.467438] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x1D, rev-id 54)
    [   21.493558] dthev2 40800000.crypto: will run requests pump with realtime priority
    [  OK  ] Reached target usb-gadget.target - Hardware activated USB gadget.
    [  OK  ] Listening on systemd-rfkill.socket…ll Switch Status /dev/rfkill Watch.
    [  OK  ] Reached target tpm2.target - Trusted Platform Module.
    [  OK  ] Finished ifupdown-pre.service - He…o synchronize boot up for ifupdown.
             Starting networking.service - Raise network interfaces...
    [   24.780190] am65-cpsw-nuss 8000000.ethernet eth1: PHY [8000f00.mdio:04] driver [Micrel KSZ8081 or KSZ8091] (irq=30)
    [   24.794434] am65-cpsw-nuss 8000000.ethernet eth1: configuring for phy/rmii link mode
    [   24.808182] 8021q: adding VLAN 0 to HW filter on device eth1
    [   25.411163] am65-cpsw-nuss 8000000.ethernet eth2: PHY [8000f00.mdio:07] driver [Micrel KSZ8081 or KSZ8091] (irq=31)
    [   25.430236] am65-cpsw-nuss 8000000.ethernet eth2: configuring for phy/rmii link mode
    [   25.452421] 8021q: adding VLAN 0 to HW filter on device eth2
    [***   ] Job networking.service/start running (15s / 5min 15s)
    [  OK  ] Finished networking.service - Raise network interfaces.
    [  OK  ] Reached target network.target - Network.
    [  OK  ] Reached target network-online.target - Network is Online.
             Starting containerd.service - containerd container runtime...
    [  OK  ] Started device_info.service - Generate device info.
             Starting ieos_daemon.service - ieos daemon service...
             Starting openvpn.service - OpenVPN service...
             Starting rpc-statd-notify.service - Notify NFS peers of a restart...
             Starting ssh.service - OpenBSD Secure Shell server...
             Starting systemd-user-sessions.service - Permit User Sessions...
    [  OK  ] Started vnstat.service - vnStat network traffic monitor.
    [  OK  ] Finished openvpn.service - OpenVPN service.
    [  OK  ] Started rpc-statd-notify.service - Notify NFS peers of a restart.
    [  OK  ] Finished systemd-user-sessions.service - Permit User Sessions.
    [  OK  ] Started serial-getty@ttyS0.service - Serial Getty on ttyS0.
    [  OK  ] Reached target getty.target - Login Prompts.
    [  OK  ] Started ssh.service - OpenBSD Secure Shell server.
    [  OK  ] Started ieos_daemon.service - ieos daemon service.
    [  OK  ] Started containerd.service - containerd container runtime.
             Starting docker.service - Docker Application Container Engine...
    
    Debian GNU/Linux 13 edge-computer ttyS0
    
    edge-computer login:
    

    3-

  • Hi Yang,

    Please do the following experiment on your board:

    Please run command 'devmem2 0x43010030 w 0x3b' before the reboot command. This switches to UART boot mode after reboot, then you would see a long character string printed after Linux is rebooted on the UART console on PC.

    Do you see this string gets printed almost immediately right after the last line "systemd-shutdown[1]: Rebooting." message, or it also takes about 3~4 minutes to see it?

  • Hi Bin,

    Our SDK version is 11.01.16, LPDDR4 capacity is 1GB, In the case of eMMC-only boot, we occasionally encounter an issue where the system gets stuck at the final stage of BL1 at asm("wfi"), during either a software reboot(reboot command) or a cold reboot(echo b > /proc/sysrq-trigger).

    I have updated the following files in arm-trusted-firmware:

    • k3-ddrss.c

      // SPDX-License-Identifier: BSD-3-Clause
      /*
       * Wrapper for Cadence DDR Driver
       *
       * Copyright (C) 2018-2025 Texas Instruments Incorporated - https://www.ti.com/
       */
      
      #include <arch.h>
      #include <arch_helpers.h>
      #include <common/bl_common.h>
      #include <common/debug.h>
      #include <errno.h>
      #include <lib/mmio.h>
      #include <lib/xlat_tables/xlat_tables_v2.h>
      #include <lib/libfdt/libfdt.h>
      #include <platform_def.h>
      
      #include <k3_console.h>
      
      #include "lpddr4_obj_if.h"
      #include "lpddr4_if.h"
      #include "lpddr4_structs_if.h"
      #include "lpddr4_ctl_regs.h"
      
      /*
       * Each NS DRAM bank entry is 'reg' node property which is
       * a sequence of (address, length) pairs of 32-bit values.
       */
      #define DRAM_ENTRY_SIZE         (4UL * sizeof(uint32_t))
      
      struct k3_ddrss_desc {
      	void *ddrss_ss_cfg;
      	void *ddrss_ctrl_mmr;
      	void *ddrss_ctl_cfg;
      	uint32_t ddr_freq0;
      	uint32_t ddr_freq1;
      	uint32_t ddr_freq2;
      	uint32_t ddr_fhs_cnt;
      	uint32_t dram_class;
      	uint32_t instance;
      	lpddr4_obj *driverdt;
      	lpddr4_config config;
      	lpddr4_privatedata pd;
      	uint64_t ecc_reserved_space;
      	bool ti_ecc_enabled;
      };
      
      static struct k3_ddrss_desc ddrss;
      const uint32_t *lpddr4_ctl_data;
      const uint32_t *lpddr4_pi_data;
      const uint32_t *lpddr4_phy_data;
      
      /* set default DDR size to 2GB */
      uint64_t ddr_ram_size = 0x80000000;
      
      #define DDRSS_CTL_CFG 0x0f308000
      #define DDRSS_CTRL_MMR_L 0x43014000
      #define DDRSS_CTRL_MMR 0x43040000
      #define DDRSS_SS_CFG 0x0f300000
      #define PLL_CFG 0x04060000
      #define DDRSS_PI_REGISTER_BLOCK__OFFS   0x2000
      #define DDRSS_PI_87__SFR_OFFS   0x15C
      #define DDRSS_PI_83__SFR_OFFS   0x14C
      #define DDRSS_CTL_350__SFR_OFFS 0x578
      #define DDRSS_CTL_342__SFR_OFFS 0x558
      
      #define DENALI_CTL_0_DRAM_CLASS_DDR4	0xA
      #define DENALI_CTL_0_DRAM_CLASS_LPDDR4	0xB
      
      #define DDRSS_V2A_CTL_REG                       0x0020
      #define DDRSS_ECC_CTRL_REG                      0x0120
      
      #define DDRSS_V2A_CTL_REG_SDRAM_IDX_CALC(x)     ((log2(x) - 16) << 5)
      #define DDRSS_V2A_CTL_REG_SDRAM_IDX_MASK        (~(0x1F << 0x5))
      #define DDRSS_V2A_CTL_REG_REGION_IDX_MASK       (~(0X1F))
      
      #define DDRSS_PLL_FREQUENCY_0 25000000
      
      #define DDR32SS_PMCTRL			(0x1000U)
      #define CANUART_WAKE_OFF_MODE_STAT	(0x1318U)
      #define RTC_ONLY_PLUS_DDR_MAGIC_WORD 	(0x6D555555U)
      
      #define GP_CORE_CTL     0
      #define PD_CRYPTO       1
      #define PD_DDR          2
      #define PD_MAIN_IP      3
      #define PD_MPU_CLST     4
      #define PD_MPU_CLST_CORE_0      5
      #define PD_MPU_CLST_CORE_1      6
      #define PD_PER                  9
      
      #define LPSC_MAIN_GP_ALWAYSON		0
      #define LPSC_MAIN_GP_TEST		1
      #define LPSC_MAIN_GP_PBIST		2
      #define LPSC_MAIN_GP_ISO0_N		3
      #define LPSC_MAIN_GP_ISO1_N		4
      #define LPSC_MAIN_GP_TIFS		5
      #define LPSC_MAIN_GP_USB0		7
      #define LPSC_MAIN_GP_USB0_ISO_N         8
      #define LPSC_MAIN_GP_USB1		9
      #define LPSC_MAIN_GP_USB1_ISO_N         10
      #define LPSC_MAIN_GP_DPHY_TX            11
      #define LPSC_MAIN_GP_WKPERI		18
      #define LPSC_MAIN_CRYPTO		19
      #define LPSC_MAIN_DDR_LOCAL		21
      #define LPSC_MAIN_DDR_CFG_ISO_N         22
      #define LPSC_MAIN_DDR_DATA_ISO_N        23
      #define LPSC_MAIN_IP_COMMON		24
      #define LPSC_MAIN_IP_DSS		25
      #define LPSC_MAIN_IP_DSI		26
      #define LPSC_MAIN_IP_EMMC8B		27
      #define LPSC_MAIN_IP_EMMC4B0            28
      #define LPSC_MAIN_IP_EMMC4B1            29
      #define LPSC_MAIN_IP_CPSW		30
      #define LPSC_MAIN_IP_GIC		32
      #define LPSC_MAIN_IP_PBIST		33
      #define LPSC_MAIN_MPU_CLST		38
      #define LPSC_MAIN_MPU_CLST_PBIST        39
      #define LPSC_MAIN_MPU_CLST_CORE_0       40
      #define LPSC_MAIN_MPU_CLST_CORE_1       41
      #define LPSC_MAIN_PER_COMMON            44
      #define LPSC_MAIN_PER_MCASP0            45
      #define LPSC_MAIN_PER_MCASP1            46
      #define LPSC_MAIN_PER_MCASP2            47
      #define LPSC_MAIN_PER_XSPI		48
      #define LPSC_MAIN_PER_MCAN0		49
      #define LPSC_MAIN_PER_MCAN1		50
      #define LPSC_MAIN_PER_MCAN2		51
      #define LPSC_MAIN_PER_GPMC		52
      
      #define PSC_SYNCRESETDISABLE		(0x0)
      #define PSC_SYNCRESET			(0x1)
      #define PSC_DISABLE			(0x2)
      #define PSC_ENABLE			(0x3)
      #define PSC_PD_OFF			(0x0)
      #define PSC_PD_ON			(0x1)
      
      #define LPSC_DDR16SS0 21
      #define LPSC_EMIF_CFG 22
      #define LPSC_EMIF_DATA 23
      
      #define MAIN_PSC_BASE 0x00400000
      #define MAIN_PSC_MDCTL_BASE 0x00400A00
      #define MAIN_PSC_MDSTAT_BASE 0x00400800
      #define MAIN_PSC_PDCTL_BASE 0x00400300
      #define MAIN_PSC_PDSTAT_BASE 0x00400200
      #define MAIN_PSC_PTSTAT (MAIN_PSC_BASE + PSC_PTSTAT)
      #define MAIN_PSC_PTCMD (MAIN_PSC_BASE + PSC_PTCMD)
      
      #define PSC_PTCMD               0x120
      #define PSC_PTCMD_H             0x124
      #define PSC_PTSTAT              0x128
      #define PSC_PTSTAT_H            0x12C
      #define PSC_PDSTAT              0x200
      #define PSC_PDCTL               0x300
      #define PSC_MDSTAT              0x800
      #define PSC_MDCTL               0xa00
      
      #define PDCTL_STATE_MASK                0x1
      #define PDCTL_STATE_OFF                 0x0
      #define PDCTL_STATE_ON                  0x1
      
      #define MDSTAT_STATE_MASK               0x3f
      #define MDSTAT_BUSY_MASK                0x30
      #define MDSTAT_STATE_SWRSTDISABLE       0x0
      #define MDSTAT_STATE_ENABLE             0x3
      
      #define TH_MACRO_EXP(fld, str) (fld ## str)
      #define TH_FLD_MASK(fld)  TH_MACRO_EXP(fld, _MASK)
      #define TH_FLD_SHIFT(fld) TH_MACRO_EXP(fld, _SHIFT)
      #define TH_FLD_WIDTH(fld) TH_MACRO_EXP(fld, _WIDTH)
      #define TH_FLD_WOCLR(fld) TH_MACRO_EXP(fld, _WOCLR)
      #define TH_FLD_WOSET(fld) TH_MACRO_EXP(fld, _WOSET)
      
      #define str(s) #s
      #define xstr(s) str(s)
      
      #define  CTL_SHIFT 11
      #define  PHY_SHIFT 11
      #define  PI_SHIFT 10
      
      #define TH_OFFSET_FROM_REG(REG, SHIFT, offset) do { \
      		char *i, *pstr = xstr(REG); offset = 0; \
      		for (i = &pstr[SHIFT]; *i != '\0'; ++i) { \
      			offset = offset * 10 + (*i - '0'); } \
      } while (0)
      
      extern void* dtb_array;
      void* dtb = &dtb_array;
      
      static inline uint64_t log2(uint64_t n)
      {
          uint64_t val;
      
          for (val = 0; n > 1; val++, n >>= 1);
          return val;
      }
      
      /********************************************
       * Internal function to set psc/lpsc state.
       ********************************************/
      static int set_main_psc_state(uint32_t pd_id, uint32_t md_id, uint32_t pd_state, uint32_t md_state)
      {
      	uint32_t *mdctrl_ptr;
      	volatile uint32_t mdctrl;
      	uint32_t *mdstat_ptr;
      	volatile uint32_t mdstat;
      	uint32_t *pdctrl_ptr;
      	volatile uint32_t pdctrl;
      	uint32_t *pdstat_ptr;
      	volatile uint32_t pdstat;
      	volatile uint32_t psc_ptstat;
      	volatile uint32_t psc_ptcmd;
      
      	mdctrl_ptr = (uint32_t *)(uint64_t)((MAIN_PSC_MDCTL_BASE + (4 * md_id)));
      	mdctrl = (uint32_t)*((uint32_t *)mdctrl_ptr);
      	mdstat_ptr = (uint32_t *)(uint64_t)((MAIN_PSC_MDSTAT_BASE + (4 * md_id)));
      	mdstat = (uint32_t)*((uint32_t *)mdstat_ptr);
      	pdctrl_ptr = (uint32_t *)(uint64_t)((MAIN_PSC_PDCTL_BASE + (4 * pd_id)));
      	pdctrl = (uint32_t)*((uint32_t *)pdctrl_ptr);
      	pdstat_ptr = (uint32_t *)(uint64_t)((MAIN_PSC_PDSTAT_BASE + (4 * pd_id)));
      	pdstat = (uint32_t)*((uint32_t *)pdstat_ptr);
      
      	if (((pdstat & 0x1) == pd_state) && ((mdstat & 0x1f) == md_state))
      		return 0;
      
      	psc_ptstat = *((uint32_t *)MAIN_PSC_PTSTAT);
      
      	/* wait for GOSTAT to get cleared */
      	while ((psc_ptstat & (0x1 << pd_id)) != 0)
      		psc_ptstat = *((uint32_t *)MAIN_PSC_PTSTAT);
      
      	/* Set PDCTL NEXT to new state */
      	*pdctrl_ptr = (pdctrl & ~(0x1)) | pd_state;
      
      	/* Set MDCTL NEXT to new state */
      	*mdctrl_ptr = (mdctrl & ~(0x1f)) | md_state;
      
      	/* start power transisition by setting PTCMD Go to 1 */
      	psc_ptcmd = *((uint32_t *)MAIN_PSC_PTCMD);
      	psc_ptcmd |= (0x1 << pd_id);
      	*((uint32_t *)MAIN_PSC_PTCMD) = psc_ptcmd;
      
      	/* wait for GOSTAT to get cleared */
      	psc_ptstat = *((uint32_t *)MAIN_PSC_PTSTAT);
      	while ((psc_ptstat & (0x1 << pd_id)) != 0)
      		psc_ptstat = *((uint32_t *)MAIN_PSC_PTSTAT);
      
      	mdstat = (uint32_t)*((uint32_t *)mdstat_ptr);
      	pdstat = (uint32_t)*((uint32_t *)pdstat_ptr);
      
      	return 0;
      }
      
      /************************************************
       * Function to set PLL divider for DDR SS clocks
       ************************************************/
      static int set_ddr_pll_div(int div)
      {
      	volatile uint32_t val;
      
      	/* Set reset to high */
      	val = (uint32_t)*((uint32_t *)(PLL_CFG + 0x88));
      	val |= 0x80000000;
      	*((uint32_t *)(PLL_CFG + 0x88)) = val;
      
      	/* Set divider value */
      	val = (uint32_t)*((uint32_t *)(PLL_CFG + 0x88));
      	val &= 0xFFFFFF80;
      	val |= div;
      	*((uint32_t *)(PLL_CFG + 0x88)) = val;
      
      	/* Set enable bit */
      	val = (uint32_t)*((uint32_t *)(PLL_CFG + 0x88));
      	val |= 0x8000;
      	*((uint32_t *)(PLL_CFG + 0x88)) = val;
      
      	/* clear reset */
      	val = (uint32_t)*((uint32_t *)(PLL_CFG + 0x88));
      	val &= 0x7FFFFFFF;
      	*((uint32_t *)(PLL_CFG + 0x88)) = val;
      
      	val = (uint32_t)*((uint32_t *)(PLL_CFG + 0x88));
      	
      	return 0;
      }
      
      /*******************************
       * Function to set DDRSS PLL
       ******************************/
      static int ddrss_set_pll(unsigned long freq)
      {
      	int ret = 0;
      
      	if (freq == ddrss.ddr_freq1)
      		ret = set_ddr_pll_div(4);
      	else if (freq == 25000000)
      		ret = set_ddr_pll_div(79);
      	
      	return ret;
      }
      
      /*************************************************************************
       * Function to change DDRSS PLL clock. It is called by the lpddr4 driver
       * during training
       ************************************************************************/
      static void k3_lpddr4_freq_update(struct k3_ddrss_desc *ddr)
      {
      	volatile uint32_t val;
      	uint32_t counter = 0;
      
      	for (counter = 0; counter < ddr->ddr_fhs_cnt; counter++) {
      		/* update the PLL divisor for DDR PLL */
      		val = (uint32_t)*((uint32_t *)(DDRSS_CTRL_MMR + 0x80));
      		val &= 0x80;
      		while (val == 0) {
      			val = (uint32_t)*((uint32_t *)(DDRSS_CTRL_MMR + 0x80));
      			val &= 0x80;
      		}
      		val = (uint32_t)*((uint32_t *)(DDRSS_CTRL_MMR + 0x80));
      
      		val &= 0x03;
      		if (val == 1)
      			ddrss_set_pll(ddr->ddr_freq1);
      		else if (val == 2)
      			ddrss_set_pll(ddr->ddr_freq2);
      		else if (val == 0)
      			ddrss_set_pll(ddr->ddr_freq0);
      		else
      			INFO("%s invalid DDR Freq request \n", __func__);
      
      		*((uint32_t *)(DDRSS_CTRL_MMR + 0x84)) = 0x01;
      		val = (uint32_t)*((uint32_t *)(DDRSS_CTRL_MMR + 0x80));
      		val &= 0x80;
      		while (val == 0x80) {
      			val = (uint32_t)*((uint32_t *)(DDRSS_CTRL_MMR + 0x80));
      			val &= 0x80;
      		}
      
      		*((uint32_t *)(DDRSS_CTRL_MMR + 0x84)) = 0x00;
      	}
      
      	INFO("%s DDR Freq change complete \n", __func__);
      }
      
      /*************************************************************************
       * Function to change DDRSS PLL clock. It is called by the lpddr4 driver
       * during training
       ************************************************************************/
      static void k3_lpddr4_ack_freq_upd_req(const lpddr4_privatedata *pd)
      {
      	if (ddrss.dram_class == DENALI_CTL_0_DRAM_CLASS_LPDDR4)
      		 k3_lpddr4_freq_update(&ddrss);
      }
      
      static void k3_lpddr4_info_handler(const lpddr4_privatedata *pd,
      				   lpddr4_infotype infotype)
      {
      	if (infotype == LPDDR4_DRV_SOC_PLL_UPDATE)
      		k3_lpddr4_ack_freq_upd_req(pd);
      }
      
      static void fdt32_to_cpu_array(uint32_t *prop, int prop_length)
      {
      	fdt32_t prop_val;
      
      	for (int i=0; i<prop_length/4; i++) {
      		prop_val = (fdt32_t) *prop;
      		*prop = fdt32_to_cpu(prop_val);
      		prop++;
      	}
      }
      
      static void lpm_restore_ddr(lpddr4_privatedata *pd, lpddr4_obj *driverdt)
      {
      	uint32_t regval;
      
      	/* disable auto-entry / -exit */
      	driverdt->readreg(pd, LPDDR4_CTL_REGS, (0x0000029C / 4), &regval);
      	regval = (regval & (0xF0F0FFFF));
      	driverdt->writereg(pd, LPDDR4_CTL_REGS, (0x0000029C / 4), regval);
      
      	/* Set the phy_set_dfi_input_Z parameter bit corresponding to the reset signal to 1'b1. Program the controller to a state */
      	driverdt->readreg(pd, LPDDR4_CTL_REGS, (0x00005468 / 4), &regval);
      	regval = (regval | (0x1));
      	driverdt->writereg(pd, LPDDR4_CTL_REGS, (0x00005468 / 4), regval);
      
      	/* Configure the DDR controller (and not the PI) to issue a PWRUP SREFRESH EXIT */
      	driverdt->readreg(pd, LPDDR4_CTL_REGS, (0x000001A8 / 4), &regval);
      	regval = (regval | (0x1));
      	driverdt->writereg(pd, LPDDR4_CTL_REGS, (0x000001A8 / 4), regval);
      
      	/* PI_PWRUP_SREFRESH_EXIT = 0 */
      	driverdt->readreg(pd, LPDDR4_CTL_REGS, (0x00002218 / 4), &regval);
      	regval = (regval & 0x0);
      	driverdt->writereg(pd, LPDDR4_CTL_REGS, (0x00002218 / 4), regval);
      
      	/*  PI_DRAM_INIT_EN = 0 */
      	driverdt->readreg(pd, LPDDR4_CTL_REGS, (0x00002228 / 4), &regval);
      	regval = (regval & (0xFFFFFEFF));
      	driverdt->writereg(pd, LPDDR4_CTL_REGS, (0x00002228 / 4), regval);
      
      	/* PI_DFI_PHYMSTR_STATE_SEL_R = 1 */
      	driverdt->readreg(pd, LPDDR4_CTL_REGS, (0x00002018 / 4), &regval);
      	regval = (regval | (0x1 << 8));
      	driverdt->writereg(pd, LPDDR4_CTL_REGS, (0x00002018 / 4), regval);
      
      	/* PHY_INDEP_INIT_MODE = 0 */
      	driverdt->readreg(pd, LPDDR4_CTL_REGS, (0x00000054 / 4), &regval);
      	regval = (regval & (0xFFFFFEFF));
      	driverdt->writereg(pd, LPDDR4_CTL_REGS, (0x00000054 / 4), regval);
      
      	/* PHY_INDEP_TRAIN_MODE = 1 */
      	driverdt->readreg(pd, LPDDR4_CTL_REGS, (0x00000050 / 4), &regval);
      	regval = (regval | (0x1 << 24));
      	driverdt->writereg(pd, LPDDR4_CTL_REGS, (0x00000050 / 4), regval);
      
      	/* De-assert the data_retention signal */
      	mmio_write_32((WKUP_CTRL_MMR_SEC_4_BASE + DDR32SS_PMCTRL), 0x0);
      	mmio_write_32((WKUP_CTRL_MMR_SEC_4_BASE + DDR32SS_PMCTRL), (0x1U << 31));
      	while ((mmio_read_32((WKUP_CTRL_MMR_SEC_4_BASE + DDR32SS_PMCTRL)) & 0x80000000) ==  0x0) {
      	}
      	mmio_write_32((WKUP_CTRL_MMR_SEC_4_BASE + DDR32SS_PMCTRL), 0x0);
      }
      
      /*************************************************************************
       * Function to change DDRSS PLL clock. It is called by the lpddr4 driver
       * during training
       ************************************************************************/
      int k3_lpddr4_init(void)
      {
      	uint16_t configsize = 0U;
      	uint32_t status = 0U;
      	lpddr4_config *config = &ddrss.config;
      	lpddr4_privatedata *pd = &ddrss.pd;
      	lpddr4_obj *driverdt;
      	volatile uint32_t val;
      	uint32_t offset = 0;
      	uint32_t regval;
      	int node;
      	uint32_t *prop;
      	int prop_length;
      	fdt32_t prop_val;
      	uint64_t reg_val;
      	int num_banks = 1;
      	uint32_t sdram_idx;
      	uint32_t v2a_ctl_reg;
      	int ret;
      	bool restore;
      
      	INFO("lpddr4_init <-- \n");
      	node = fdt_node_offset_by_compatible(dtb, -1, "ti,am62l-ddrss");
      
      	if (node >=0 ) {	
      		prop = (void*) fdt_getprop(dtb, node, "ti,ddr-fhs-cnt",&prop_length);
      		if (prop) {
      			prop_val = (fdt32_t) *prop;
      			ddrss.ddr_fhs_cnt = fdt32_to_cpu(prop_val);
      		}
      		
      		prop = (void*) fdt_getprop(dtb, node, "ti,ddr-freq0",&prop_length);
      		if (prop) {
      			prop_val = (fdt32_t) *prop;
      			ddrss.ddr_freq0 = fdt32_to_cpu(prop_val);
      		}
      		else
      			ddrss.ddr_freq0 = DDRSS_PLL_FREQUENCY_0;
      
      		prop = (void*) fdt_getprop(dtb, node, "ti,ddr-freq1",&prop_length);
      		if (prop) {
      			prop_val = (fdt32_t) *prop;
      			ddrss.ddr_freq1 = fdt32_to_cpu(prop_val);
      		}
      		
      		prop = (void*) fdt_getprop(dtb, node, "ti,ddr-freq2",&prop_length);
      		if (prop) {
      			prop_val = (fdt32_t) *prop;
      			ddrss.ddr_freq2 = fdt32_to_cpu(prop_val);
      		}
      
      		prop = (void*) fdt_getprop(dtb, node, "ti,ctl-data",&prop_length);
      
      		if (prop) {	
      			lpddr4_ctl_data = prop;
      			fdt32_to_cpu_array(prop, prop_length);
      		}
      
      		prop = (void*) fdt_getprop(dtb, node, "ti,pi-data",&prop_length);
      
      		if (prop) {
      			lpddr4_pi_data = prop;
      			fdt32_to_cpu_array(prop, prop_length);
      		}
      
      		prop = (void*) fdt_getprop(dtb, node, "ti,phy-data",&prop_length);
      
      		if (prop) {
      			lpddr4_phy_data = prop;
      			fdt32_to_cpu_array(prop, prop_length);
      		}
      		
      		INFO("lpddr4 dtb: ctl-data ptr=%p, pi-data=%p, phy-data=%p\n",lpddr4_ctl_data,lpddr4_pi_data,lpddr4_phy_data); 
      	}
      	else
      		return -ENODEV;
      
      	regval = *((uint32_t*)lpddr4_ctl_data);
      	ddrss.dram_class = ((regval & TH_FLD_MASK(LPDDR4__DRAM_CLASS__FLD)) >> TH_FLD_SHIFT(LPDDR4__DRAM_CLASS__FLD));
      	NOTICE("BL1: dram_class: %d\n",ddrss.dram_class);
      
      	/* Find 'memory' node */
      	node = fdt_node_offset_by_prop_value(dtb, -1, "device_type", "memory", sizeof("memory"));
      
      	INFO("memory node =0x%x \n",node);
      	if (node < 0) {
      		WARN("FCONF: Unable to locate 'memory' node\n");
      		goto set_psc_def_pll;
      	}
      
      	prop = (void*) fdt_getprop(dtb, node, "reg", &prop_length);
      	if (prop == NULL) {
      		WARN("failed to read 'reg' property\n");
      	}
      
      	num_banks = prop_length / DRAM_ENTRY_SIZE;
      	ddr_ram_size = 0;
      	for (unsigned long i = 0UL; i < num_banks; i++) {
      		/* first property is bank base addess followed by bank size */	
      		reg_val = fdt32_to_cpu(prop[i*4+2]);
      		reg_val = (reg_val << 32) | fdt32_to_cpu(prop[i*4+3]);
      		ddr_ram_size += reg_val; 
      	}
      
      set_psc_def_pll:
      	if (ddrss.dram_class == DENALI_CTL_0_DRAM_CLASS_LPDDR4)
      		ddrss_set_pll(ddrss.ddr_freq0);
      	else
      		ddrss_set_pll(ddrss.ddr_freq1);
      
      	/* Disable the DDR LPSCs to start in known state */
      	ret = set_main_psc_state(PD_DDR, LPSC_MAIN_DDR_LOCAL, PSC_PD_OFF, PSC_DISABLE);
      	if (ret != 0U)
      		return ret;
      
      	ret = set_main_psc_state(PD_DDR, LPSC_MAIN_DDR_CFG_ISO_N, PSC_PD_OFF, PSC_DISABLE);
      	if (ret != 0U)
      		return ret;
      
      	ret = set_main_psc_state(PD_DDR, LPSC_MAIN_DDR_DATA_ISO_N, PSC_PD_OFF, PSC_DISABLE);
      	if (ret != 0U)
      		return ret;
      
      	/* Enable DDR LPSCs to configure the controllers */
      	ret = set_main_psc_state(PD_DDR, LPSC_MAIN_DDR_LOCAL, PSC_PD_ON, PSC_ENABLE);
      	if (ret != 0U)
      		return ret;	
      	
      	ret = set_main_psc_state(PD_DDR, LPSC_MAIN_DDR_CFG_ISO_N, PSC_PD_ON, PSC_ENABLE);
      	if (ret != 0U)
      		return ret;	
      	
      	ret = set_main_psc_state(PD_DDR, LPSC_MAIN_DDR_DATA_ISO_N, PSC_PD_ON, PSC_ENABLE);
      	if (ret != 0U)
      		return ret;	
      
      	ddrss.ddrss_ctl_cfg = (void *)DDRSS_CTL_CFG;
      	ddrss.ddrss_ctrl_mmr = (void *)DDRSS_CTRL_MMR;
      	ddrss.ddrss_ss_cfg = (void *)DDRSS_SS_CFG;
      
      	ddrss.driverdt = lpddr4_getinstance();
      	driverdt = ddrss.driverdt;
      
      	driverdt->probe(config, &configsize);
      	INFO("lpddr4: probe done \n");
      
      	/* set LPDDR4 size */
      	sdram_idx = DDRSS_V2A_CTL_REG_SDRAM_IDX_CALC(ddr_ram_size);
      	v2a_ctl_reg = (uint32_t) *((uint32_t*)(DDRSS_SS_CFG + DDRSS_V2A_CTL_REG));
      	v2a_ctl_reg = (v2a_ctl_reg & DDRSS_V2A_CTL_REG_SDRAM_IDX_MASK) | sdram_idx;
      	*((uint32_t*)(DDRSS_SS_CFG + DDRSS_V2A_CTL_REG)) = v2a_ctl_reg;
      	
      	/* Initialize LPDDR4 */
      	config->ctlbase = ddrss.ddrss_ctl_cfg;
      	config->infohandler = k3_lpddr4_info_handler;
      	driverdt->init(pd, config);
      	INFO("lpddr4/ddr4: init done \n");
      
      	/* Configure DDR with config and control structures */
      	driverdt->writectlconfigex(pd, lpddr4_ctl_data, LPDDR4_INTR_CTL_REG_COUNT);
      	driverdt->writephyindepconfigex(pd, lpddr4_pi_data, LPDDR4_INTR_PHY_INDEP_REG_COUNT);
      	driverdt->writephyconfigex(pd, lpddr4_phy_data, LPDDR4_INTR_PHY_REG_COUNT);
      
      	TH_OFFSET_FROM_REG(LPDDR4__START__REG, CTL_SHIFT, offset);
      	ERROR("start-status: offset =0x%x \n", offset);
      
      	driverdt->readreg(pd, LPDDR4_CTL_REGS, offset, &regval);
      	ERROR("start-status reg: before =0x%x \n", regval);
      	if ((regval & TH_FLD_MASK(LPDDR4__START__FLD)) != 0)
      		ERROR("LPDDR4 prestart failed \n");
      
      	restore = (mmio_read_32((WKUP_CTRL_MMR_SEC_5_BASE + CANUART_WAKE_OFF_MODE_STAT)) == RTC_ONLY_PLUS_DDR_MAGIC_WORD);
      	if (restore) {
      		ERROR("Exiting RTC only + DDR");
      		lpm_restore_ddr(pd, driverdt);
      	} else {
      		ERROR("Doing normal DDR init");
      	}
      
      	INFO("lpddr4: Start DDR controller \n");
      	status = driverdt->start(pd);
      	if (status != 0) {
      		ERROR("lpddr4: start failed status = 0x%x\n", status);
      		return status;
      	}	
      	else
      		ERROR("lpddr4: start completed successfully status=0x%x\n", status);
      
      	/* check poststart status */
      	driverdt->readreg(pd, LPDDR4_CTL_REGS, offset, &regval);
      	ERROR("start-status reg: after =0x%x \n", regval);
      	if ((regval & TH_FLD_MASK(LPDDR4__START__FLD)) != 1) {
      		ERROR("LPDDR4 poststart failed \n");
      		return -EFAULT;
      	}
      	else
      		ERROR("LPDDR4 start completed !! \n");
      
      	val = (uint32_t)*((uint32_t *)(DDRSS_CTL_CFG + DDRSS_PI_REGISTER_BLOCK__OFFS + DDRSS_PI_83__SFR_OFFS));
      	ERROR("lpddr4: post start - PI training status=0x%x \n", val);
      
      	val = (uint32_t)*((uint32_t *)(DDRSS_CTL_CFG + DDRSS_CTL_342__SFR_OFFS));
      	ERROR("lpddr4: post start - CTL Interrupt status=0x%x \n", val);
      
      	return 0;
      }
    • k3_bl1_setup.c

      /*
       * Copyright (c) 2015-2025, ARM Limited and Contributors. All rights reserved.
       *
       * SPDX-License-Identifier: BSD-3-Clause
       */
      
      #include <platform_def.h>
      
      #include <arch.h>
      #include <arch_helpers.h>
      #include <common/bl_common.h>
      #include <common/debug.h>
      #include <drivers/delay_timer.h>
      #include <drivers/generic_delay_timer.h>
      #include <lib/mmio.h>
      #include <lib/xlat_tables/xlat_tables_v2.h>
      
      #include <k3_console.h>
      #include <k3-ddrss.h>
      #include <mailbox.h>
      #include <ti_sci_protocol.h>
      
      #define ADDR_DOWN(_adr) (_adr & XLAT_ADDR_MASK(2U))
      #define SIZE_UP(_adr, _sz) (round_up((_adr + _sz), XLAT_BLOCK_SIZE(2U)) - ADDR_DOWN(_adr))
      
      #define K3_MAP_REGION_FLAT(_adr, _sz, _attr) \
      	MAP_REGION_FLAT(ADDR_DOWN(_adr), SIZE_UP(_adr, _sz), _attr)
      
      const mmap_region_t plat_k3_mmap[] = {
      	K3_MAP_REGION_FLAT(0,       0x100000000,       MT_DEVICE | MT_RW | MT_SECURE),
      	{ /* sentinel */ }
      };
      
      #define PADCONF_ADDR				(0x4084000)
      #define WKUP_BOOT_MODE				(0x43010030)
      #define WKUP_BOOT_MODE_XSPI_MODE		(0x273)
      #define MAIN_PLL_MMR_BASE			(0x04060000UL)
      #define MAIN_PLL_MMR_CFG_PLL8_HSDIV_CTRL0	(0x00008080UL)
      #define CTL_MMR_BASE_CFG5			(0x43050000U)
      #define CANUART_WAKE_OFF_MODE_STAT		(0x1318U)
      #define RTC_ONLY_PLUS_DDR_MAGIC_WORD		(0x6D555555U)
      #define BL1_DONE_MSG_ID				(0x810A)
      
      /* OSPI related registers */
      #define FSS_OSPI_CTRL_BASE (0xFC40000)
      #define FSS_OSPI_FLASH_CMD_CTRL_REG (0x90)
      #define FSS_OSPI_OPCODE_EXT_LOWER_REG (0xE0)
      
      meminfo_t *bl1_plat_sec_mem_layout(void)
      {
      	return NULL;
      }
      
      /*******************************************************************************
       * Perform any BL1 specific platform actions.
       ******************************************************************************/
      void bl1_early_platform_setup(void)
      {
      	volatile uint32_t* uart_ptr;
      
      	/* Set UART pins */
      	uart_ptr = (uint32_t*) (PADCONF_ADDR+0x1b4);
      	*uart_ptr = 0x50000;
      	uart_ptr = (uint32_t*) (PADCONF_ADDR+0x1b8);
      	*uart_ptr = 0x10000;
      	/* Set WKUP UART pins */
      	uart_ptr = (uint32_t*) (PADCONF_ADDR);
      	*uart_ptr = 0x50000;
      	uart_ptr = (uint32_t*) (PADCONF_ADDR+0x4);
      	*uart_ptr = 0x10000;
      
      	/* Initialize the console to provide early debug support */
      	k3_console_setup();
      
      	/* PLL8_HSDIV0 feeds A53, bump it up to 1.25GHz, VCO @2.5GHz */
      	mmio_write_32(MAIN_PLL_MMR_BASE + MAIN_PLL_MMR_CFG_PLL8_HSDIV_CTRL0, 0x8001);
      }
      
      /******************************************************************************
       * Perform the very early platform specific architecture setup.  This only
       * does basic initialization. Later architectural setup (bl1_arch_setup())
       * does not do anything platform specific.
       *****************************************************************************/
      void bl1_plat_arch_setup(void)
      {
      	int	ro_txt_size;
      	int	ro_data_size;
      	int 	rw_size;
      
      	NOTICE("%s arch setup \n", __func__);
      	ro_txt_size = (intptr_t) __RODATA_START__ - BL1_RO_BASE;
      	ro_data_size = BL1_RW_BASE - (intptr_t) __RODATA_START__;
      	rw_size = BL1_RW_LIMIT+1 - BL1_RW_BASE;
      	const mmap_region_t bl_regions[] = {
      		MAP_REGION_FLAT(BL1_RO_BASE,			ro_txt_size,		MT_CODE | MT_SECURE),
      		MAP_REGION_FLAT(BL1_RO_BASE+ro_txt_size,	ro_data_size,		MT_MEMORY | MT_RW | MT_SECURE),
      		MAP_REGION_FLAT(BL1_RW_BASE,           		rw_size,		MT_MEMORY | MT_RW | MT_SECURE),
      		{ /* sentinel */ }
      	};
      
      	setup_page_tables(bl_regions, plat_k3_mmap);
      	enable_mmu_el3(0);
      }
      
      struct
      {
      	uint16_t cmdid;         //!< The command ID
      	uint8_t  hostid;        //!< Identifies the queue number used for replies to a received message
      	uint8_t  seqnum;        //!< A sequence number used to detect lost messages
      	uint32_t sizeandflags;  //!< If size is present, three bytes of flags, last byte of size
      	uint32_t magicnum;              //!< Magic number to check this is indeed multistage context and should be applied
      	uint32_t rsvd;              //!< Magic number to check this is indeed multistage context and should be applied
      	union {
      		uint32_t imageoffset[4];    //!< image offset for block/image mode
      		char  filename[32];      //!< Filesystem file name for filesystem mode, max 32 chars
      	} imagelocator;
      }__packed a53_rom_msg_obj;
      
      struct{
      	struct ti_sci_secure_msg_hdr secure_hdr;
      	struct tisci_msg_min_context_restore_req req;
      }__packed a53_tifs_msg_obj;
      
      unsigned int plat_get_syscnt_freq2(void)
      {
      	return 200 * MHZ_TICKS_PER_SEC;
      }
      
      void k3_bl1_handoff(void)
      {
      	bool is_rtc_only_ddr_exit;
      
      	/* Workaround for errata i2462, soft reset the flash */
      	if (mmio_read_32(WKUP_BOOT_MODE) == WKUP_BOOT_MODE_XSPI_MODE) {
      		/* Send flash reset sequence, 0x66, 0x99 */
      		mmio_write_32(FSS_OSPI_CTRL_BASE + FSS_OSPI_OPCODE_EXT_LOWER_REG, 0x66);
      		mmio_write_32(FSS_OSPI_CTRL_BASE + FSS_OSPI_FLASH_CMD_CTRL_REG, 0x66000001);
      		udelay(200);
      		mmio_write_32(FSS_OSPI_CTRL_BASE + FSS_OSPI_OPCODE_EXT_LOWER_REG, 0x99);
      		mmio_write_32(FSS_OSPI_CTRL_BASE + FSS_OSPI_FLASH_CMD_CTRL_REG, 0x99000001);
      		udelay(200);
      	}
      
      	is_rtc_only_ddr_exit = (mmio_read_32((CTL_MMR_BASE_CFG5 + CANUART_WAKE_OFF_MODE_STAT)) == RTC_ONLY_PLUS_DDR_MAGIC_WORD);
      
      	if (is_rtc_only_ddr_exit) {
      		struct ti_sci_msg msg;
      
      		a53_tifs_msg_obj.secure_hdr.checksum = 0;
      		a53_tifs_msg_obj.secure_hdr.reserved = 0;
      		a53_tifs_msg_obj.req.hdr.host = 0xA;
      		a53_tifs_msg_obj.req.hdr.seq = 0x12;
      		a53_tifs_msg_obj.req.hdr.type = 0x0308;
      		a53_tifs_msg_obj.req.ctx_lo = 0x80A00000U;
      		a53_tifs_msg_obj.req.ctx_hi = 0x00000000U;
      
      		ti_sci_boot_notification();
      
      		msg.buf = (uint8_t *)&a53_tifs_msg_obj;
      		msg.len = sizeof(a53_tifs_msg_obj);
      		ti_sci_transport_send(SP_NOTIFY, &msg);
      		NOTICE("%s sent message to tifs\n", __func__);
      		asm ("wfi");
      	} else {
      		struct ti_sci_msg msg;
      
      		a53_rom_msg_obj.cmdid = BL1_DONE_MSG_ID;
      		a53_rom_msg_obj.hostid = 0;
      		a53_rom_msg_obj.seqnum = 0;
      		a53_rom_msg_obj.sizeandflags = 0x0c000000;
      
      		a53_rom_msg_obj.magicnum = 0x11112222;
      		a53_rom_msg_obj.rsvd = 0x0;
      		a53_rom_msg_obj.imagelocator.imageoffset[0] = 0x0;
      		a53_rom_msg_obj.imagelocator.imageoffset[1] = 0x0;
      		a53_rom_msg_obj.imagelocator.imageoffset[2] = 0x0;
      		a53_rom_msg_obj.imagelocator.imageoffset[3] = 0x0;
      
      		if ((mmio_read_32(WKUP_BOOT_MODE) & 0xf8) == 0x40) {
      			/* SD boot mode */
      			ERROR("BL1: SD boot mode\n");
      			memset(a53_rom_msg_obj.imagelocator.filename, 0, sizeof(a53_rom_msg_obj.imagelocator.filename));
      			snprintf(a53_rom_msg_obj.imagelocator.filename, sizeof(a53_rom_msg_obj.imagelocator.filename), "%s%s", "\\", "tispl.bin");
      		} else {
      			ERROR("BL1: SPL boot mode\n");
      			a53_rom_msg_obj.imagelocator.imageoffset[0] = K3_SPL_IMG_OFFSET;
      		}
      
      		msg.buf = (uint8_t *)&a53_rom_msg_obj;
      		msg.len = sizeof(a53_rom_msg_obj);
      		ti_sci_transport_send(SP_NOTIFY, &msg);
      		ERROR("%s ENTERING WFI - end of bl1\n", __func__);
      		asm ("wfi");
      	}
      }
      
      void bl1_platform_setup(void)
      {
      	/* Initialize tick timer required for udelays */
      	generic_delay_timer_init();
      
      	if (k3_lpddr4_init() != 0U)
      		ERROR("%s DDR init failed \n", __func__);
      	else {
      		ERROR("%s DDR init done\n", __func__);
      		k3_bl1_handoff();
      	}
      }
      
      struct image_desc * bl1_plat_get_image_desc(unsigned int image_id)
      {
          return NULL;
      }
      
      void platform_mem_init(void)
      {
      }
      
      int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
                                uintptr_t *image_spec)
      {
          return 0;
      }
      

    The only purpose of these updates was to change certain INFO logs to ERROR level, in order to reduce interference from excessive INFO or NOTICE messages(Previously, I also inserted logs into the BL31 entry function (bl31_main. c void bl31_main (void)), but did not print the BL31 log information during exceptions).

    During reboot, the system occasionally shows the following abnormal behavior (the freeze always lasts exactly 6 minutes):

    BL1 -> stuck for 6 minutes -> BL1 -> BL31

    The following is the abnormal reboot log I captured today. It includes LPDDR initialization and training information, but when compared to the normal log, they appear identical.

    • Below is the normal BL1 boot log

      [Rx][17:51:41.262] ERROR:   start-status: offset =0x0 
      [Rx][17:51:41.262] ERROR:   start-status reg: before =0x10460b00 
      [Rx][17:51:41.262] ERROR:   Doing normal DDR initERROR:   lpddr4: start completed successfully status=0x0
      [Rx][17:51:41.282] ERROR:   start-status reg: after =0x10460b01 
      [Rx][17:51:41.293] ERROR:   LPDDR4 start completed !! 
      [Rx][17:51:41.293] ERROR:   lpddr4: post start - PI training status=0x27c0a000 
      [Rx][17:51:41.304] ERROR:   lpddr4: post start - CTL Interrupt status=0x0 
      [Rx][17:51:41.304] ERROR:   bl1_platform_setup DDR init done
      [Rx][17:51:41.312] ERROR:   BL1: SPL boot mode
      [Rx][17:51:41.312] ERROR:   k3_bl1_handoff ENTERING WFI - end of bl1
      [Rx][17:51:41.802] 
      [Rx][17:51:41.802] U-Boot SPL 2025.01 (Oct 25 2025 - 17:25:00 +0800)
      [Rx][17:51:41.813] DDR:   Auto-detected 1GiB
      [Rx][17:51:41.813] Trying to boot from eMMC
      [Rx][17:51:42.282] 
      [Rx][17:51:42.282] 
      [Rx][17:51:42.282] U-Boot 2025.01 (Oct 25 2025 - 17:25:00 +0800)
      [Rx][17:51:42.282] 
      [Rx][17:51:42.282] SoC:   AM62LX SR1.1 HS-FS
      [Rx][17:51:42.282] DDR:   Auto-detected 1GiB
      [Rx][17:51:42.432] Loading Environment OK
    • Below is the abnormal BL1 boot log

      [Rx][18:22:30.283] ERROR:   start-status: offset =0x0 
      [Rx][18:22:30.283] ERROR:   start-status reg: before =0x10460b00 
      [Rx][18:22:30.300] ERROR:   Doing normal DDR initERROR:   lpddr4: start completed successfully status=0x0
      [Rx][18:22:30.321] ERROR:   start-status reg: after =0x10460b01 
      [Rx][18:22:30.321] ERROR:   LPDDR4 start completed !! 
      [Rx][18:22:30.328] ERROR:   lpddr4: post start - PI training status=0x27c0a000 
      [Rx][18:22:30.328] ERROR:   lpddr4: post start - CTL Interrupt status=0x0 
      [Rx][18:22:30.346] ERROR:   bl1_platform_setup DDR init done
      [Rx][18:22:30.346] ERROR:   BL1: SPL boot mode
      [Rx][18:22:30.346] ERROR:   k3_bl1_handoff ENTERING WFI - end of bl1
      [Rx][18:28:25.422] ERROR:   start-status: offset =0x0 
      [Rx][18:28:25.440] ERROR:   start-status reg: before =0x10460b00 
      [Rx][18:28:25.440] ERROR:   Doing normal DDR initERROR:   lpddr4: start completed successfully status=0x0
      [Rx][18:28:25.460] ERROR:   start-status reg: after =0x10460b01 
      [Rx][18:28:25.460] ERROR:   LPDDR4 start completed !! 
      [Rx][18:28:25.460] ERROR:   lpddr4: post start - PI training status=0x27c0a000 
      [Rx][18:28:25.462] ERROR:   lpddr4: post start - CTL Interrupt status=0x0 
      [Rx][18:28:25.482] ERROR:   bl1_platform_setup DDR init done
      [Rx][18:28:25.482] ERROR:   BL1: SPL boot mode
      [Rx][18:28:25.482] ERROR:   k3_bl1_handoff ENTERING WFI - end of bl1
      [Rx][18:28:25.962] 
      [Rx][18:28:25.962] U-Boot SPL 2025.01 (Oct 25 2025 - 17:25:00 +0800)
      [Rx][18:28:25.962] DDR:   Auto-detected 1GiB
      [Rx][18:28:25.980] Trying to boot from eMMC
      [Rx][18:28:26.442] 
      [Rx][18:28:26.442] 
      [Rx][18:28:26.442] U-Boot 2025.01 (Oct 25 2025 - 17:25:00 +0800)
      [Rx][18:28:26.442] 
      [Rx][18:28:26.442] SoC:   AM62LX SR1.1 HS-FS
      [Rx][18:28:26.442] DDR:   Auto-detected 1GiB
      [Rx][18:28:26.583] Loading Environment OK

    Therefore, I would like to understand what the CPU is doing during this stable 6-minute period, so that we can reverse-engineer the root cause. For example:

    • Is it possible that BL1 is failing to locate the second-stage image (BL31) on the eMMC, and then iterating through other boot media (which might take about 6 minutes to complete a full cycle)?

    • Or is it waiting for DDR training to complete, with a DDR training timeout of 6 minutes?

    In any case, this consistent 6-minute delay must correspond to a predictable internal process.

  • Additional information: When the ATF (arm rusted firmware) log level is ERROR (BL1_LOG_LEVEL=10), the reproduction probability is 1/30. However, when the log level is adjusted to INFO (BL1_LOG_LEVEL=40), it has been tested more than 2000 times and has not been reproduced yet.

    [Rx][19:16:56.042] INFO:    PSCI Power Domain Map:
    [Rx][19:16:56.042] INFO:      Domain Node : Level 2, parent_node 4294967295, State ON (0x0)
    [Rx][19:16:56.058] INFO:      Domain Node : Level 1, parent_node 0, State ON (0x0)
    [Rx][19:16:56.058] INFO:      CPU Node : MPID 0x0, parent_node 1, State ON (0x0)
    [Rx][19:16:56.058] INFO:      CPU Node : MPID 0xffffffffffffffff, parent_node 1, State OFF (0x2)
    [Rx][19:16:56.346] NOTICE:  bl1_plat_arch_setup arch setup 
    [Rx][19:16:56.346] NOTICE:  Booting Trusted Firmware
    [Rx][19:16:56.363] NOTICE:  BL1: v2.12.0(release):V2.0.2-1-g448fd8896-dirty
    [Rx][19:16:56.363] NOTICE:  BL1: Built : 19:14:44, Oct 25 2025
    [Rx][19:16:56.363] INFO:    BL1: RAM 0x7080b000 - 0x7080f000
    [Rx][19:16:56.363] INFO:    lpddr4_init <-- 
    [Rx][19:16:56.363] INFO:    lpddr4 dtb: ctl-data ptr=0x7080618c, pi-data=0x70806834, phy-data=0x70806da4
    [Rx][19:16:56.363] NOTICE:  BL1: dram_class: 11
    [Rx][19:16:56.363] INFO:    memory node =0x28 
    [Rx][19:16:56.363] INFO:    lpddr4: probe done 
    [Rx][19:16:56.363] INFO:    lpddr4/ddr4: init done 
    [Rx][19:16:56.363] INFO:    start-status: offset =0x0 
    [Rx][19:16:56.363] INFO:    start-status reg: before =0x10460b00 
    [Rx][19:16:56.363] INFO:    Doing normal DDR initINFO:    lpddr4: Start DDR controller 
    [Rx][19:16:56.376] INFO:    k3_lpddr4_freq_update DDR Freq change complete 
    [Rx][19:16:56.389] INFO:    lpddr4: start completed successfully status=0x0
    [Rx][19:16:56.389] INFO:    start-status reg: after =0x10460b01 
    [Rx][19:16:56.389] INFO:    LPDDR4 start completed !! 
    [Rx][19:16:56.389] NOTICE:  lpddr4: post start - PI training status=0x27c0a000 
    [Rx][19:16:56.404] INFO:    lpddr4: post start - CTL Interrupt status=0x0 
    [Rx][19:16:56.404] NOTICE:  bl1_platform_setup DDR init done
    [Rx][19:16:56.404] NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
    [Rx][19:16:56.722] NOTICE:  BL31: v2.12.0(release):V2.0.2-1-g448fd8896-dirty
    [Rx][19:16:56.737] NOTICE:  BL31: Built : 19:14:44, Oct 25 2025
    [Rx][19:16:56.737] INFO:    GICv3 without legacy support detected.
    [Rx][19:16:56.737] INFO:    ARM GICv3 driver initialized in EL3
    [Rx][19:16:56.737] INFO:    Maximum SPI INTID supported: 991
    [Rx][19:16:56.751] INFO:    stub copy 0x707f0000  0x80041000  0x707f6528
    [Rx][19:16:56.751] INFO:    A53 stub copy passed
    [Rx][19:16:56.751] NOTICE:  SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.12-v11.01.12 (Fancy Rat)')
    [Rx][19:16:56.767] INFO:    BL31: Initializing runtime services
    [Rx][19:16:56.767] INFO:    BL31: Preparing for EL3 exit to normal world
    [Rx][19:16:56.767] INFO:    Entry point address = 0x82000000
    [Rx][19:16:56.782] INFO:    SPSR = 0x3c9
    [Rx][19:16:56.934] 
    [Rx][19:16:56.934] U-Boot SPL 2025.01 (Oct 25 2025 - 19:14:51 +0800)
    [Rx][19:16:56.949] DDR:   Auto-detected 1GiB
    [Rx][19:16:56.949] Trying to boot from eMMC
    [Rx][19:16:57.408] 
    [Rx][19:16:57.408] 
    [Rx][19:16:57.408] U-Boot 2025.01 (Oct 25 2025 - 19:14:51 +0800)
    [Rx][19:16:57.423] 
    [Rx][19:16:57.423] SoC:   AM62LX SR1.1 HS-FS
    [Rx][19:16:57.423] DDR:   Auto-detected 1GiB
    [Rx][19:16:57.561] Loading Environment OK

  • Hi Yufeng,

    Our SDK version is 11.01.16, LPDDR4 capacity is 1GB, In the case of eMMC-only boot,

    How did you flash the u-boot binaries to eMMC? what is the boot mode pin setting on your custom board?

  • Hi Bin,

    Thank you for your reply, I created an SD card boot disk and burned the complete system firmware (including u-boot image, kernel image, and file system image) to eMMC media using the 'dd' command.

    My custom board boot mode pin[Bit0 - Bit15] is : 1100001100101100

    The startup mode is RAW mode, and the u-boot offset relative to eMMC is 4MiB

    U-boot packaging script:

    dd if=/dev/zero         of=${U_BOOT_IMG} bs=1K count=8192 conv=notrunc iflag=fullblock && sync 
    dd if=build/tiboot3.bin of=${U_BOOT_IMG} bs=1K seek=0     conv=notrunc iflag=fullblock && sync
    dd if=build/tispl.bin   of=${U_BOOT_IMG} bs=1K seek=512   conv=notrunc iflag=fullblock && sync
    dd if=build/u-boot.img  of=${U_BOOT_IMG} bs=1K seek=2560  conv=notrunc iflag=fullblock && sync

  • What is $U_BOOT_IMG in the command? 

  • Hi Bin,

    The environmental information is as follows:

            The SDK version used is ti-sdk-11.01.16.13;
            The ATF, Otee, and Ti Linux firmware used in the u-boot firmware are as follows:
                  ~/ti-sdk-11.01.16.13/board-support/trusted-firmware-a-2.13+git
                  ~/ti-sdk-11.01.16.13/board-support/optee-os-4.7.0+git
                  ~/ti-sdk-11.01.16.13/board-support/prebuilt-images/am62lxx-evm/ti-sysfw
            The cross compilation toolchain is as follows:
                  arm-gnu-toolchain-13.3.rel1-x86_64-aarch64-none-linux-gnu
                  arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-linux-gnueabihf
            The configuration file for uboot can be found in the attachment. config
                  The compilation script for uboot can be found in the attached build.sh file
            The source code modification information for ATF, optere, and Ti Linux firmware is as follows:
                  ATF has been updated~/ ti-sdk-11.01.16.13/board-support/trusted-firmware-a-2.13+git/fdts/k3-am62l-ddr.dts, The purpose is to use the adapted DDR configuration information and change the DDR capacity in the memory node to 1GB (default 2GB)
                  optee, No changes made
                  ti-linux-firmware, No changes made
            Abnormal phenomenon description:
                  The default ATF and optere log levels in uboot are set to NOTICE;
                  There is a probability (1/30) of getting stuck in the last ASM WFI of BL1 during repeated hot or cold restarts (echo b>/pc/sysrq trigger) until the 6-minute timeout, after which the CPU re executes BL1 and then starts normally;
           Similar to CPU ->BL1->stuck for 6 minutes ->BL1->BL31->BL33->...
    The following compressed file contains the compiled script:
    The compressed file below contains the compiled uboot firmware:
    The following is the log of the hanging test, the last time it was stuck for 6 minutes:
  • I was asking what $U_BOOT_IMG is to understand where you flashed the U-Boot binaries to.

    and the u-boot offset relative to eMMC is 4MiB

    I am not sure what it is, but

    My custom board boot mode pin[Bit0 - Bit15] is : 1100001100101100

    It appears you use eMMC UDA boot mode.

    Can you please switch to "eMMC Boot" mode (bootmode pin[3-6]: 1001) and flash the U-Boot binaries to eMMC boot0 partition to see if you still have such boot problem?

  • Hi,

    The essence of $U_SOOT_IMG is an 8MiB uboot complete image, including (tiboot3.bin, tispl.bin, u-boot. img), packaged as follows:
    dd if=/dev/zero of=${U_BOOT_IMG} bs=1K count=8192 conv=notrunc iflag=fullblock && sync
    dd if=build/tiboot3.bin of=${U_BOOT_IMG} bs=1K seek=0 conv=notrunc iflag=fullblock && sync
    dd if=build/tispl.bin of=${U_BOOT_IMG} bs=1K seek=512 conv=notrunc iflag=fullblock && sync
    dd if=build/u-boot.img of=${U_BOOT_IMG} bs=1K seek=2560 conv=notrunc iflag=fullblock && sync
    Yes, main boot mode is eMMC's UDA, and the offset of the uboot image relative to the UDA physical address is 4MiB
    I will rebuild tiboot3.bin for booting on the eMMC boot0 partition. After actual testing, I will provide the latest results.
  • The device was set to "eMMC Boot" mode yesterday, with the operation steps as follows:

    Step 1: 

    dd if=/dev/zero of=/dev/mmcblk0p3 bs=1M && sync

    echo 0 > /sys/block/mmcblk0boot0/force_ro

    mkdir /mnt/sdboot && mount /dev/mmcblk1p2 /mnt/sdboot && cd /mnt/sdboot

    dd if=tiboot3.bin of=/dev/mmcblk0boot0 bs=1M && sync

    dd if=tispl.bin of=/dev/mmcblk0boot0 bs=1M seek=1 && sync

    dd if=u-boot.img of=/dev/mmcblk0boot0 bs=1M seek=3 && sync

    The compressed file below contains:"tiboot3.bin","tispl.bin" and "u-boot.img"

    0310.boot.zip

    Step 2:

    mmc partconf 0 1 1 1

    Step 3:

    bootmode change to "emmc boot",   boot mode pin[3-6]=1001;

    However, after multiple soft reboots of the device (189 times this time), the issue of it freezing for 6 minutes still persists.

    The logs for normal operation are as follows:

    [Rx][23:47:57.851] INFO:    PSCI Power Domain Map:
    [Rx][23:47:57.861] INFO:      Domain Node : Level 2, parent_node 4294967295, State ON (0x0)
    [Rx][23:47:57.861] INFO:      Domain Node : Level 1, parent_node 0, State ON (0x0)
    [Rx][23:47:57.883] INFO:      CPU Node : MPID 0x0, parent_node 1, State ON (0x0)
    [Rx][23:47:57.905] INFO:      CPU Node : MPID 0xffffffffffffffff, parent_node 1, State OFF (0x2)
    [Rx][23:47:58.120] NOTICE:  bl1_plat_arch_setup arch setup 
    [Rx][23:47:58.144] NOTICE:  Booting Trusted Firmware
    [Rx][23:47:58.165] NOTICE:  BL1: v2.12.0(release):
    [Rx][23:47:58.165] NOTICE:  BL1: Built : 17:35:26, Oct 29 2025
    [Rx][23:47:58.165] INFO:    BL1: RAM 0x7080b000 - 0x7080f000
    [Rx][23:47:58.165] INFO:    lpddr4_init <-- 
    [Rx][23:47:58.165] INFO:    lpddr4 dtb: ctl-data ptr=0x7080618c, pi-data=0x70806834, phy-data=0x70806da4
    [Rx][23:47:58.186] NOTICE:  BL1: dram_class: 11
    [Rx][23:47:58.186] INFO:    memory node =0x28 
    [Rx][23:47:58.186] INFO:    lpddr4: probe done 
    [Rx][23:47:58.186] INFO:    lpddr4/ddr4: init done 
    [Rx][23:47:58.186] INFO:    start-status: offset =0x0 
    [Rx][23:47:58.186] INFO:    start-status reg: before =0x10460b00 
    [Rx][23:47:58.209] INFO:    Doing normal DDR initINFO:    lpddr4: Start DDR controller 
    [Rx][23:47:58.209] INFO:    k3_lpddr4_freq_update DDR Freq change complete 
    [Rx][23:47:58.209] INFO:    lpddr4: start completed successfully status=0x0
    [Rx][23:47:58.229] INFO:    start-status reg: after =0x10460b01 
    [Rx][23:47:58.229] INFO:    LPDDR4 start completed !! 
    [Rx][23:47:58.229] NOTICE:  lpddr4: post start - PI training status=0x27c0a000 
    [Rx][23:47:58.229] INFO:    lpddr4: post start - CTL Interrupt status=0x0 
    [Rx][23:47:58.248] NOTICE:  bl1_platform_setup DDR init done
    [Rx][23:47:58.248] NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
    [Rx][23:47:58.541] NOTICE:  BL31: v2.12.0(release):
    [Rx][23:47:58.565] NOTICE:  BL31: Built : 17:35:28, Oct 29 2025
    [Rx][23:47:58.565] INFO:    GICv3 without legacy support detected.
    [Rx][23:47:58.585] INFO:    ARM GICv3 driver initialized in EL3
    [Rx][23:47:58.585] INFO:    Maximum SPI INTID supported: 991
    [Rx][23:47:58.585] INFO:    stub copy 0x707f0000  0x80041000  0x707f6528
    [Rx][23:47:58.585] INFO:    A53 stub copy passed
    [Rx][23:47:58.585] NOTICE:  SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.12-v11.01.12 (Fancy Rat)')
    [Rx][23:47:58.607] INFO:    BL31: Initializing runtime services
    [Rx][23:47:58.607] INFO:    BL31: Preparing for EL3 exit to normal world
    [Rx][23:47:58.607] INFO:    Entry point address = 0x82000000
    [Rx][23:47:58.607] INFO:    SPSR = 0x3c9
    [Rx][23:47:58.761] 
    [Rx][23:47:58.761] U-Boot SPL 2025.01 (Oct 29 2025 - 17:35:37 +0800)
    [Rx][23:47:58.791] SPL initial stack usage: 1936 bytes
    [Rx][23:47:58.791] Trying to boot from MMC1
    [Rx][23:47:59.251] 
    [Rx][23:47:59.261] 
    [Rx][23:47:59.261] U-Boot 2025.01 (Oct 29 2025 - 17:35:37 +0800)
    [Rx][23:47:59.261] 
    [Rx][23:47:59.261] SoC:   AM62LX SR1.1 HS-FS
    [Rx][23:47:59.261] DRAM:  1 GiB
    

    The logs for abnormal startup are as follows:

    [Rx][23:48:42.311] INFO:    PSCI Power Domain Map:
    [Rx][23:48:42.321] INFO:      Domain Node : Level 2, parent_node 4294967295, State ON (0x0)
    [Rx][23:48:42.321] INFO:      Domain Node : Level 1, parent_node 0, State ON (0x0)
    [Rx][23:48:42.347] INFO:      CPU Node : MPID 0x0, parent_node 1, State ON (0x0)
    [Rx][23:48:42.369] INFO:      CPU Node : MPID 0xffffffffffffffff, parent_node 1, State OFF (0x2)
    [Rx][23:48:42.591] NOTICE:  bl1_plat_arch_setup arch setup 
    [Rx][23:48:42.591] NOTICE:  Booting Trusted Firmware
    [Rx][23:48:42.601] NOTICE:  BL1: v2.12.0(release):
    [Rx][23:48:42.601] NOTICE:  BL1: Built : 17:35:26, Oct 29 2025
    [Rx][23:48:42.601] INFO:    BL1: RAM 0x7080b000 - 0x7080f000
    [Rx][23:48:42.625] INFO:    lpddr4_init <-- 
    [Rx][23:48:42.625] INFO:    lpddr4 dtb: ctl-data ptr=0x7080618c, pi-data=0x70806834, phy-data=0x70806da4
    [Rx][23:48:42.647] NOTICE:  BL1: dram_class: 11
    [Rx][23:48:42.647] INFO:    memory node =0x28 
    [Rx][23:48:42.647] INFO:    lpddr4: probe done 
    [Rx][23:48:42.647] INFO:    lpddr4/ddr4: init done 
    [Rx][23:48:42.647] INFO:    start-status: offset =0x0 
    [Rx][23:48:42.672] INFO:    start-status reg: before =0x10460b00 
    [Rx][23:48:42.672] INFO:    Doing normal DDR initINFO:    lpddr4: Start DDR controller 
    [Rx][23:48:42.672] INFO:    k3_lpddr4_freq_update DDR Freq change complete 
    [Rx][23:48:42.698] INFO:    lpddr4: start completed successfully status=0x0
    [Rx][23:48:42.698] INFO:    start-status reg: after =0x10460b01 
    [Rx][23:48:42.698] INFO:    LPDDR4 start completed !! 
    [Rx][23:48:42.698] NOTICE:  lpddr4: post start - PI training status=0x27c0a000 
    [Rx][23:48:42.698] INFO:    lpddr4: post start - CTL Interrupt status=0x0 
    [Rx][23:48:42.750] NOTICE:  bl1_platform_setup DDR init done
    [Rx][23:48:42.750] NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
    [Rx][23:48:48.101] NOTICE:  bl1_plat_arch_setup arch setup 
    [Rx][23:48:48.125] NOTICE:  Booting Trusted Firmware
    [Rx][23:48:48.145] NOTICE:  BL1: v2.12.0(release):
    [Rx][23:48:48.145] NOTICE:  BL1: Built : 17:35:26, Oct 29 2025
    [Rx][23:48:48.145] INFO:    BL1: RAM 0x7080b000 - 0x7080f000
    [Rx][23:48:48.145] INFO:    lpddr4_init <-- 
    [Rx][23:48:48.145] INFO:    lpddr4 dtb: ctl-data ptr=0x7080618c, pi-data=0x70806834, phy-data=0x70806da4
    [Rx][23:48:48.169] NOTICE:  BL1: dram_class: 11
    [Rx][23:48:48.169] INFO:    memory node =0x28 
    [Rx][23:48:48.169] INFO:    lpddr4: probe done 
    [Rx][23:48:48.169] INFO:    lpddr4/ddr4: init done 
    [Rx][23:48:48.169] INFO:    start-status: offset =0x0 
    [Rx][23:48:48.169] INFO:    start-status reg: before =0x10460b00 
    [Rx][23:48:48.169] INFO:    Doing normal DDR initINFO:    lpddr4: Start DDR controller 
    [Rx][23:54:44.120] NOTICE:  bl1_plat_arch_setup arch setup 
    [Rx][23:54:44.120] NOTICE:  Booting Trusted Firmware
    [Rx][23:54:44.144] NOTICE:  BL1: v2.12.0(release):
    [Rx][23:54:44.144] NOTICE:  BL1: Built : 17:35:26, Oct 29 2025
    [Rx][23:54:44.166] INFO:    BL1: RAM 0x7080b000 - 0x7080f000
    [Rx][23:54:44.166] INFO:    lpddr4_init <-- 
    [Rx][23:54:44.166] INFO:    lpddr4 dtb: ctl-data ptr=0x7080618c, pi-data=0x70806834, phy-data=0x70806da4
    [Rx][23:54:44.166] NOTICE:  BL1: dram_class: 11
    [Rx][23:54:44.166] INFO:    memory node =0x28 
    [Rx][23:54:44.189] INFO:    lpddr4: probe done 
    [Rx][23:54:44.189] INFO:    lpddr4/ddr4: init done 
    [Rx][23:54:44.189] INFO:    start-status: offset =0x0 
    [Rx][23:54:44.189] INFO:    start-status reg: before =0x10460b00 
    [Rx][23:54:44.189] INFO:    Doing normal DDR initINFO:    lpddr4: Start DDR controller 
    [Rx][23:54:44.209] INFO:    k3_lpddr4_freq_update DDR Freq change complete 
    [Rx][23:54:44.209] INFO:    lpddr4: start completed successfully status=0x0
    [Rx][23:54:44.209] INFO:    start-status reg: after =0x10460b01 
    [Rx][23:54:44.228] INFO:    LPDDR4 start completed !! 
    [Rx][23:54:44.228] NOTICE:  lpddr4: post start - PI training status=0x27c0a000 
    [Rx][23:54:44.228] INFO:    lpddr4: post start - CTL Interrupt status=0x0 
    [Rx][23:54:44.228] NOTICE:  bl1_platform_setup DDR init done
    [Rx][23:54:44.228] NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
    [Rx][23:54:44.540] NOTICE:  BL31: v2.12.0(release):
    [Rx][23:54:44.540] NOTICE:  BL31: Built : 17:35:28, Oct 29 2025
    [Rx][23:54:44.540] INFO:    GICv3 without legacy support detected.
    [Rx][23:54:44.566] INFO:    ARM GICv3 driver initialized in EL3
    [Rx][23:54:44.587] INFO:    Maximum SPI INTID supported: 991
    [Rx][23:54:44.587] INFO:    stub copy 0x707f0000  0x80041000  0x707f6528
    [Rx][23:54:44.587] INFO:    A53 stub copy passed
    [Rx][23:54:44.587] NOTICE:  SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.12-v11.01.12 (Fancy Rat)')
    [Rx][23:54:44.587] INFO:    BL31: Initializing runtime services
    [Rx][23:54:44.610] INFO:    BL31: Preparing for EL3 exit to normal world
    [Rx][23:54:44.610] INFO:    Entry point address = 0x82000000
    [Rx][23:54:44.610] INFO:    SPSR = 0x3c9
    [Rx][23:54:44.751] 
    [Rx][23:54:44.751] U-Boot SPL 2025.01 (Oct 29 2025 - 17:35:37 +0800)
    [Rx][23:54:44.791] SPL initial stack usage: 1936 bytes
    [Rx][23:54:44.791] Trying to boot from MMC1
    [Rx][23:54:45.251] 
    [Rx][23:54:45.251] 
    [Rx][23:54:45.251] U-Boot 2025.01 (Oct 29 2025 - 17:35:37 +0800)
    [Rx][23:54:45.251] 
    [Rx][23:54:45.251] SoC:   AM62LX SR1.1 HS-FS
    [Rx][23:54:45.261] DRAM:  1 GiB
    

  • Below is the schematic diagram of our hardware. Could you also help review it? Thank you!

      

    AM62L31_S_MB_251030-1.pdf

  • Hi Yang,

    Thanks for providing the normal and abnormal logs, it seems the BL1 routine runs longer when the issue happens. I will look into it.

  • Hi Bin , sync a new piece of information.

    1/In eMMC boot mode,Solder the pull-up resistors for eMMC lines D1-D7. After testing reboots over 1200 times, the issue was not reproduced.

    Two units were tested in total, both of which were devices that had previously been able to reproduce the issue..

    2/    He requested the removal of the pull-up resistors on D1-D7 and the pull-down capacitor on WAKEUP。

    Retest Results:

    ①:In eMMC boot mode,  Test 168 times,issue was reproducible..

    ②:After switching to eMMC UDA mode, Test 69 times,  issue was reproducible..

  • Hi Yang,

    I believe Biao Li has been discussing this issue with our hardware engineer on a separate channel. Let's wait until the hardware questions are cleared, and will continue the software discussion on this e2e thread.

  • Hi Yang,

    For the eMMC D1..D7, the SOC is expected to enable the internal pulls after disabling the pulls internal to the eMMC device.

    Can you verify if the internal pulls are being enabled?

    Although optional, it is Ok to mount 49.9K or 47K pullups for D1..D7 since the parallel resistor combination will still be within the JEDEC spec in case SOC  internal pulls are disabled.

    Regards,

    Sreenivasa

  • Hi Sreenivasa,

    Attached is the configuration of mmc0.

  • Hi Yang,

    Can you please apply the following patch to TF-A (<sdk>/board-support/trusted-firmware-a-2.13+git), then rebuild U-Boot to see if it resolves the reboot issue?

    diff --git a/plat/ti/k3/common/k3_bl1_setup.c b/plat/ti/k3/common/k3_bl1_setup.c
    index 5dc812e7f35f..be6bb2471930 100644
    --- a/plat/ti/k3/common/k3_bl1_setup.c
    +++ b/plat/ti/k3/common/k3_bl1_setup.c
    @@ -188,7 +188,8 @@ void k3_bl1_handoff(void)
                    msg.len = sizeof(a53_rom_msg_obj);
                    ti_sci_transport_send(SP_NOTIFY, &msg);
                    NOTICE("%s ENTERING WFI - end of bl1\n", __func__);
    -               asm ("wfi");
    +               while (1)
    +                       asm ("wfi");
            }
     }

  • Please test the patch without the external pullup resisters installed on D1..D7 when originally the issue happens.

  • Hi Bin,

    Should sleep and log be added in the loop?

  • Hi Yufeng,

    We don't have to. If the patch doesn't resolve the issue, the root cause is something else.

  • Hi Bin,

    I am compiling the ATF with patches and will update the test results tomorrow. Thank you for your support.

  • Hi Bin,

    The pull-up resistors for D1-D7 are not populated.   

    Based on the above comments, the test results are as follows.

  • Hi Yang,

    In the previous error log (abnormal_log.txt), the following message was printed the 2nd time at line 28, about 6 seconds after its previous line, and printed the 3rd time at line 42, about 6 minutes after its previous line.

            NOTICE:  bl1_plat_arch_setup arch setup

    While with the patch, the console log shows the same message printed the 2nd time about 6 minutes after its previous line.

    So basically with the patch the 6-seconds delay is removed, right?

    I will try something on my evm and provide a debug patch next week.

  • Hi Bin,

    I would like to consult another question.

    As we are currently using eMMC UDA RAW bootup mode, tispl should be loaded to the 0x0 offset address of the eMMC UDA partition in this mode, but it conflicts with the GPT partition table; Based on our experience with the AM62X chip, we used a redundant address, which is the 0x400000 offset address of the eMMC UDA partition for load tispl. At present, this processing solution is running normally on our custom motherboard (except for the issue of being stuck in BL1 during restart).

    Is this processing solution reliable, as the manual for the AM62L chip does support eMMC UDA RAW bootup mode.

  • Hi,Bin

    We need to synchronize the test information.

    1. We use "emmc+UDA+RAW" mode,  the verification we performed yesterday based on your suggestions was also conducted in this mode,

    Abnormal logs under this mode are consistent, without 6s repeated printing.

    2.The 6-second repeated printing you observed was verified in the eMMC boot mode.

  • Hi Yang,

    In general, the UDA RAW boot mode is not suitable for Linux, as you mentioned, the location of tiboot3.bin conflicts with the GPT table. So we don't recommend to use UDA RAW boot mode for Linux, regardless this 6-mins reboot issue.

    The eMMC boot0 mode is resolved in AM62L SR1.1, so we should use boot0 mode from now on.

    Abnormal logs under this mode are consistent, without 6s repeated printing.

    2.The 6-second repeated printing you observed was verified in the eMMC boot mode.

    Does my "while(1)" patch make any difference in the eMMC boot0 mode?

  • Hi Bin, The "while(1)" patch has not yet been verified in eMMC boot mode.

  • Hi Yang,

    Attached is the configuration of mmc0.

    In SDK 11.01.16.13, the MMC0 devicetree pinmux in both U-Boot and kernel has been updated. Please see the details linked below.

    https://git.ti.com/cgit/ti-u-boot/ti-u-boot/tree/dts/upstream/src/arm64/ti/k3-am62l3-evm.dts?h=11.01.16#n250

    https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts?h=11.01.16#n250

    Can you please update your MMC0 pinmux in both U-Boot and kernel to remove the pullup (_PULLUP) in MMC0_CMD and MMC0_DAT0, and test to see if the reboot stuck issue still happens?

  • and please add the "while (1)" patch.

  • Hi Bin,I'm sorry for the delay due to some unexpected matters.

    The latest test results are as follows:

    1.eMMC UDA RAW,added the patch and encountered a 6-minute freeze;

    2.eMMC UDA FS,added the patch and encountered a 6-minute freeze;

    3.emmc boot ,added the patch and encountered a 6-minute freeze; (the attached log is for this mode.)

    [Rx][09:44:02.555] [   43.521916] systemd-shutdown[1]: Syncing filesystems and block devices.
    [Rx][09:44:02.575] [   43.531911] systemd-shutdown[1]: Rebooting.
    [Rx][09:44:02.775] NOTICE:  bl1_plat_arch_setup arch setup 
    [Rx][09:44:02.784] NOTICE:  Booting Trusted Firmware
    [Rx][09:44:02.784] NOTICE:  BL1: v2.12.0(release):V2.0.0-beta.3-1-gfdb394301-dirty
    [Rx][09:44:02.794] NOTICE:  BL1: Built : 15:18:10, Nov 14 2025
    [Rx][09:44:02.794] NOTICE:  BL1: dram_class: 11
    [Rx][09:44:02.814] NOTICE:  lpddr4: post start - PI training status=0x27c0a000 
    [Rx][09:44:02.814] NOTICE:  bl1_platform_setup DDR init done
    [Rx][09:44:02.814] NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
    [Rx][09:44:08.235] NOTICE:  bl1_plat_arch_setup arch setup 
    [Rx][09:44:08.235] NOTICE:  Booting Trusted Firmware
    [Rx][09:44:08.245] NOTICE:  BL1: v2.12.0(release):V2.0.0-beta.3-1-gfdb394301-dirty
    [Rx][09:44:08.245] NOTICE:  BL1: Built : 15:18:10, Nov 14 2025
    [Rx][09:44:08.255] NOTICE:  BL1: dram_class: 11
    [Rx][09:50:05.005] NOTICE:  bl1_plat_arch_setup arch setup 
    [Rx][09:50:05.005] NOTICE:  Booting Trusted Firmware
    [Rx][09:50:05.005] NOTICE:  BL1: v2.12.0(release):V2.0.0-beta.3-1-gfdb394301-dirty
    [Rx][09:50:05.015] NOTICE:  BL1: Built : 15:18:10, Nov 14 2025
    [Rx][09:50:05.015] NOTICE:  BL1: dram_class: 11
    [Rx][09:50:05.035] NOTICE:  lpddr4: post start - PI training status=0x27c0a000 
    [Rx][09:50:05.035] NOTICE:  bl1_platform_setup DDR init done
    [Rx][09:50:05.045] NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
    [Rx][09:50:05.355] NOTICE:  BL31: v2.12.0(release):V2.0.0-beta.3-1-gfdb394301-dirty
    [Rx][09:50:05.365] NOTICE:  BL31: Built : 15:18:11, Nov 14 2025
    [Rx][09:50:05.365] NOTICE:  SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.12-v11.01.12 (Fancy Rat)')
    [Rx][09:50:05.545] 
    [Rx][09:50:05.545] U-Boot SPL 2025.01 (Nov 14 2025 - 15:18:17 +0800)
    [Rx][09:50:05.575] SPL initial stack usage: 1936 bytes
    [Rx][09:50:05.575] Trying to boot from MMC1
    [Rx][09:50:06.044] 
    [Rx][09:50:06.044] 
    [Rx][09:50:06.044] U-Boot 2025.01 (Nov 14 2025 - 15:18:17 +0800)
    [Rx][09:50:06.054] 
    [Rx][09:50:06.054] SoC:   AM62LX SR1.1 HS-FS
    [Rx][09:50:06.054] DRAM:  1 GiB
    [Rx][09:50:06.235] Core:  76 devices, 26 uclasses, devicetree: separate
    [Rx][09:50:06.235] MMC:   mmc@fa10000: 0, mmc@fa00000: 1
    [Rx][09:50:06.245] Loading Environment from nowhere... OK
    [Rx][09:50:06.245] In:    serial@2800000
    [Rx][09:50:06.255] Out:   serial@2800000
    [Rx][09:50:06.255] Err:   serial@2800000
    [Rx][09:50:06.394] Verify  GPT: success!
    [Rx][09:50:06.405] boot information:  
    [Rx][09:50:06.405]     active slot: A
    [Rx][09:50:06.405]     max tries  : 3
    [Rx][09:50:06.405]     slots      : 
    [Rx][09:50:06.415]         slot a : tries=0, success=true , bootable=true 
    [Rx][09:50:06.415]         slot b : tries=0, success=false, bootable=false
    [Rx][09:50:06.426]     system     : 
    [Rx][09:50:06.426]         reset enable : true 
    [Rx][09:50:06.426]         reset factory: false
    [Rx][09:50:06.435] 
    [Rx][09:50:06.775] 61905778 bytes read in 341 ms (173.1 MiB/s)
    [Rx][09:50:06.775] ## Loading kernel from FIT Image at 90000000 ...
    [Rx][09:50:06.775]    Using 'config-1' configuration
    [Rx][09:50:06.785]    Verifying Hash Integrity ... sha512,rsa4096:custMpk+ OK
    [Rx][09:50:06.795]    Trying 'kernel-1' kernel subimage
    [Rx][09:50:06.795]      Description:  Linux kernel
    [Rx][09:50:06.795]      Created:      2025-10-16   6:27:56 UTC
    [Rx][09:50:06.807]      Type:         Kernel Image
    [Rx][09:50:06.807]      Compression:  lz4 compressed
    [Rx][09:50:06.815]      Data Start:   0x900000c8
    [Rx][09:50:06.815]      Data Size:    14737262 Bytes = 14.1 MiB
    [Rx][09:50:06.815]      Architecture: AArch64
    [Rx][09:50:06.815]      OS:           Linux
    [Rx][09:50:06.827]      Load Address: 0x82000000
    [Rx][09:50:06.827]      Entry Point:  0x82000000
    [Rx][09:50:06.827]      Hash algo:    sha512
    [Rx][09:50:06.827]      Hash value:   355c8361a07e839fa822ad0e34f8cb28a6f46df85ca74e00f2971e9991c5dd6a4c02aaec3ddad830325cb82f022c20fa27d18a9b103a52899a6e1d08f8cc4897
    [Rx][09:50:06.848]    Verifying Hash Integrity ... sha512+ OK
    [Rx][09:50:07.145] ## Loading ramdisk from FIT Image at 90000000 ...
    [Rx][09:50:07.145]    Using 'config-1' configuration
    [Rx][09:50:07.155]    Verifying Hash Integrity ... sha512,rsa4096:custMpk+ OK
    [Rx][09:50:07.165]    Trying 'ramdisk-1' ramdisk subimage
    [Rx][09:50:07.165]      Description:  initramfs
    [Rx][09:50:07.165]      Created:      2025-10-16   6:27:56 UTC
    [Rx][09:50:07.175]      Type:         RAMDisk Image
    [Rx][09:50:07.175]      Compression:  uncompressed
    [Rx][09:50:07.175]      Data Start:   0x90e19fdc
    [Rx][09:50:07.175]      Data Size:    47116787 Bytes = 44.9 MiB
    [Rx][09:50:07.186]      Architecture: AArch64
    [Rx][09:50:07.186]      OS:           Linux
    [Rx][09:50:07.186]      Load Address: 0x88080000
    [Rx][09:50:07.195]      Entry Point:  0x88080000
    [Rx][09:50:07.195]      Hash algo:    sha512
    [Rx][09:50:07.195]      Hash value:   3ad502918ec8de5a809f8b18ee3b3454f1fbbe28d56646073fa8cdaabad16848a651a5f6ff0cd0978b678c1f54270e4cb0329db2b426944f9a56fc66e4a782d2
    [Rx][09:50:07.215]    Verifying Hash Integrity ... sha512+ OK
    [Rx][09:50:08.165]    Loading ramdisk from 0x90e19fdc to 0x88080000
    [Rx][09:50:08.404] ## Loading fdt from FIT Image at 90000000 ...
    [Rx][09:50:08.404]    Using 'config-1' configuration
    [Rx][09:50:08.414]    Verifying Hash Integrity ... sha512,rsa4096:custMpk+ OK
    [Rx][09:50:08.428]    Trying 'fdt-1' fdt subimage
    [Rx][09:50:08.428]      Description:  Flattened Device Tree blob
    [Rx][09:50:08.428]      Created:      2025-10-16   6:27:56 UTC
    [Rx][09:50:08.435]      Type:         Flat Device Tree
    [Rx][09:50:08.435]      Compression:  uncompressed
    [Rx][09:50:08.435]      Data Start:   0x90e0e158
    [Rx][09:50:08.446]      Data Size:    48528 Bytes = 47.4 KiB
    [Rx][09:50:08.446]      Architecture: AArch64
    [Rx][09:50:08.446]      Load Address: 0x88000000
    [Rx][09:50:08.455]      Hash algo:    sha512
    [Rx][09:50:08.455]      Hash value:   716b1c31e33f01aa23f1f655caa8f3a231c50d8ca4624212ea695bb72b0c5b370afc1d75f45b3f6fbe4ccaeaeeae3bc61e21adddc83d8a2276a8c5acdc7479a4
    [Rx][09:50:08.466]    Verifying Hash Integrity ... sha512+ OK
    [Rx][09:50:08.475]    Loading fdt from 0x90e0e158 to 0x88000000
    [Rx][09:50:08.475]    Booting using the fdt blob at 0x88000000
    [Rx][09:50:08.475] Working FDT set to 88000000
    [Rx][09:50:08.486]    Uncompressing Kernel Image to 82000000
    [Rx][09:50:08.814]    Loading Ramdisk to 8d310000, end 8ffff1f3 ... OK
    [Rx][09:50:08.864]    Loading Device Tree to 000000008d301000, end 000000008d30fd8f ... OK
    [Rx][09:50:08.875] Working FDT set to 8d301000
    [Rx][09:50:08.894] 
    [Rx][09:50:08.894] Starting kernel ...
    [Rx][09:50:08.894] 
    [Rx][09:50:09.084] [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
    [Rx][09:50:09.084] [    0.000000] Linux version 6.12.43 #3 SMP PREEMPT_RT Thu Oct 16 11:34:30 CST 2025
    [Rx][09:50:09.094] [    0.000000] Machine model: Texas Instruments AM62L3 Evaluation Module
    [Rx][09:50:09.106] [    0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002800000 (options '')
    [Rx][09:50:09.114] [    0.000000] printk: legacy bootconsole [ns16550a0] enabled
    [Rx][09:50:09.114] [    0.000000] OF: reserved mem: 0x0000000080200000..0x00000000809fffff (8192 KiB) nomap non-reusable optee@80200000
    [Rx][09:50:09.125] [    0.000000] OF: reserved mem: 0x0000000080000000..0x00000000801fffff (2048 KiB) nomap non-reusable tfa@80000000
    [Rx][09:50:09.134] [    0.000000] Zone ranges:
    [Rx][09:50:09.134] [    0.000000]   DMA      [mem 0x0000000080000000-0x00000000bfffffff]

  • Hi Yang,

    Hi Sreenivasa,

    Attached is the configuration of mmc0.

    You said you use SDK 11.1.16.13 and provided mmc0 pinmux back in Nov. 6, but your mmc0 pinmux doesn't match to the devicetree in SDK 11.1.16.13.

    Can you please explain why they don't match? I just wanted to ensure you use the correct SDK.

  • Hi Bin,

    As shown in the screenshot, we adapted the SDK 11.00.15.05 in August, and have already completed the hardware adaptation work for our custom board (dts device tree and GPIO pinmux); In October, we re adapted the SDK version 11.01.16.13 and reused the dts file from version 11.01.15.05 when adapting to this version of the SDK.

  • Hi Yufeng,

    Which exact devicetree file(s) do you reuse from SDK 11.0.15.5? only k3-am62l3-evm.dts or some other *.dtsi as well? Please note that the SoC dtsi files, for example, k3-am62l-main.dtsi are quite different in both SDK versions, and they cannot be reused in new SDK.

  • Hi Bin,

    The following are dts and dtsi in u-boot, where k3-am62l3-pinmux.dtsi is for unified management of newly added files in pinmux, and k3-am62l3-evm.dts and k3-am62l3-u-boot. dtsi are the adapted device tree files.

    u-boot-dts.zip

    The following are dts and dtsi in kernel, where k3-am62l3-pinmux.dtsi is for unified management of newly added files in pinmux, and k3-am62l3-evm.dts are the adapted device tree files.

    kernel-dts.zip

    Except for dts or dtsi in the zip file, no other device tree files have been modified. Due to some reasons, I can only display a partial pinmux. If needed, I can provide it separately.

  • Hi Yufeng,

    Can you please try to delete the following two lines form devicetree sdhci0 node in k3-am62l-main.dtsi in both U-Boot and kernel, to see if it has any impact on the 6-mins boot delay problem?

    ti,otap-del-sel-mmc-hs = <0x0>;
    ti,otap-del-sel-hs200 = <0x6>;

    This change disables higher eMMC speed, and makes eMMC runs at the lowest speed.

  • Hi Bin,

    We removed these two lines from the u-boot and kernel device trees, and the tests still froze for 6 minutes after restarting

    The firmware now uses emmc boot0 and adds the "while (1)" patch

    This is the kernel log before deletion:

    This is the kernel log after deletion:

  • Hi Wei,

    Thanks for the testing.

    My custom board boot mode pin[Bit0 - Bit15] is : 1100001100101100

    The boot pin [10-13] is 1011, which is on MMCSD boot on MMC1. Can you please change pin [10-13] to 1100, which is UART boot, and provide the console log when the 6-mins stuck issue happens?

  • Hi Bin,

    pin[10-13] to 1100,  The attached image shows the console log

  • Hi Yang,

    Thanks for the testing. Please apply the patch attached below to TF-A and rebuild TF-A & U-Boot to see if it removes the 6-mins stuck issue.

    diff --git a/plat/ti/k3/common/drivers/lpddr4/k3-ddrss.c b/plat/ti/k3/common/drivers/lpddr4/k3-ddrss.c
    index 475adbb00f84..f05bc3107f2a 100644
    --- a/plat/ti/k3/common/drivers/lpddr4/k3-ddrss.c
    +++ b/plat/ti/k3/common/drivers/lpddr4/k3-ddrss.c
    @@ -537,6 +537,20 @@ set_psc_def_pll:
     	else
     		ddrss_set_pll(ddrss.ddr_freq1);
     
    +	/* Disable the DDR LPSCs to start in known state */
    +	ret = set_main_psc_state(PD_DDR, LPSC_MAIN_DDR_DATA_ISO_N, PSC_PD_ON, PSC_SYNCRESETDISABLE);
    +	if (ret != 0)
    +		return ret;
    +
    +	ret = set_main_psc_state(PD_DDR, LPSC_MAIN_DDR_CFG_ISO_N, PSC_PD_ON, PSC_SYNCRESETDISABLE);
    +	if (ret != 0)
    +		return ret;
    +
    +	ret = set_main_psc_state(PD_DDR, LPSC_MAIN_DDR_LOCAL, PSC_PD_OFF, PSC_SYNCRESETDISABLE);
    +	if (ret != 0)
    +		return ret;
    +
    +	/* Enable DDR LPSCs to configure the controllers */
     	ret = set_main_psc_state(PD_DDR, LPSC_MAIN_DDR_LOCAL, PSC_PD_ON, PSC_ENABLE);
     	if (ret != 0U)
     		return ret;	
    

  • Hi Bin,

    According to your latest feedback, there is still an issue where it gets stuck for 6 minutes.(It occurs after 61 tests.)

  • Hi Yang,

    I believe this is what happened:

    The board has eMMC design problem which causes read issue sometimes. When the read issue happens in eMMC primary boot mode, ROM failed to load tispl.bin, then switched to the backup boot mode which is SDcard boot. Since the board doesn''t has a SD card inserted, it then switches back to eMMC primary boot and loads/runs tiboot3.bin again, but this time DDR init failed because DDR init has already been done when running tiboot3.bin at the first time. Then the boot process got stuck there for about 6 minutes until the watchdog kicks in and reset the entire AM62L.

    The TF-A patch above was an attempt to solve the DDR re-init problem. But it seems the problem is not in the relevant code path. I am discussing the issue with our sw dev team to see if there is any solution for the DDR re-init, but the real fix has to in the eMMC design, I see our hw engineers have been discussing this offline.

  • Hi,Bin,

    The PCB hardware for our V1.1 version has been received (the schematic has been revised according to the feedback from TI's hardware engineers).

    We are use EMMC+UDA + FS mode, a total of 2 devices were tested.

    1. When the U-Boot log displays these messages(see the attached figure below), the 6-minute hang issue can typically be reproduced after approximately 100 execution cycles.

    2. When the U-Boot log displays these messages(see the attached figure below),  it has been tested more than 3000 times and has not been reproduced yet.

    I hope the information I provided proves helpful for your analysis. Thank you.

  • Hi Yang,

    Thanks for the information.

    I see the second log has more information than the first one, and the ATF/U-Boot have different build time. Do you use different build option or debug enabled in the second build?

    I also see the ATF version is different in the two logs (v2.12.0(relase):V2.0.7-test.3 vs. v2.12.0(release):V2.0.0-beta.6). Why do you use the two different versions of ATF?

  • Hello Yang, 

    When the U-Boot log displays these messages(see the attached figure below), the 6-minute hang issue can typically be reproduced after approximately 100 execution cycles.

    Could you please explain what you mean by execution cycle.

    Regards,

    Sreenivasa

  • Hi Bin,

    this is my fault. The provided image was only intended to demonstrate the difference in the amount of U-Boot printed logs.

    The print log from the actual test can be seen in the attached image below.

  • Once the device starts up, execute the reboot command.