GPIO interrupt mapping in evmc6678l

Chunjian Li

Other Parts Discussed in Thread: TMS320C6678

Hi there,

I am trying to configure the GP10 pin to generate an primary interrupt. Is it such that the GP10 pin maps to the GPINT10 event by definition? or is there some kind of programmable mapping?

It seems like there is some sort of mapping, since there are 16 GPIO pins, but only 8 primary interrupts to the cpu?

Can't find any mapping diagram anywhere. only found one for the c64x, but it seems very diffeferent.

Regards,

CJ.

over 14 years ago

0 Chad Courtney over 14 years ago

TI__Mastermind 30825 points

CJ,

The mapping of the Interrupts are in the Data Manual, and explanation on the mapping (yes, you'll need to map the GPIO interrupts to primary interrupts if you're wanting to interrupt a core with it.) The documentation can be found on the TMS320C6678 page.

Best Regards,

Chad

0 Chunjian Li over 14 years ago in reply to Chad Courtney

Intellectual 680 points

Hi Chad,

Thanks for the info.

I did read the TMS320C6678 document. My question is, there are 8 INT for GPIO (GPINT8 - 15), while there are more GPIO pins (16 pins). So clearly it is not one-to-one mapping. Which pin maps to which GPINT? I can't find this information anywhere.

/CJ

0 Chad Courtney over 14 years ago in reply to Chunjian Li

TI__Mastermind 30825 points

Each GPIO generates it's specific interrupt/event which will may go to several different locations to be used. Each GPIO[n] has a corresponding interrupt/event name GPINTn

So GPINT8 is for GPIO8.

GPINT0-7 are directed to specific cores as GPINTn where n is the GPIO # and the core Number. This is event #90 for the given core, see table 7-38 of the data manual. These events are also driven to the EDMA as well. All this is documented in section 7.9 of the Data Manual.

Best Regards,

Chad

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GPIO interrupt mapping in evmc6678l