I am a newer ,and I want to know is there an example to configure GPIO interrupt with sys/bios 6 .I know how to configure GPIO with in/output mux but don't know how to configure interrupt.
Sorry.My express is so poor
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Yes, you configure interrupts with the Hwi module. Please see the BIOS user guide for more information on the Hwi module.
Thanks! I configure this modules success (Ps :maybe!) .And I can enter ISR but when I read the GPIO_IRQSTATUS_0 (I configure it with line 0 ), the register value is always zero . Not the value I think (0X400,I confiure GP2-10 with Edge trigger )
Now my question is that the bios will auto clear this value when enter ISR or my code is wrong .
You didn't say which processor you are trying to do this on, but BIOS does not clear any GPIO status register.
If you an unsure, I would recommend put a breakpoint at the beginning of the ISR stub before any ISR processing really happens just to confirm.
Judah
Sorry ,I use the IPNC_RDK_version_2.8 with DM8127 and I want to use GPIO interrupt on M3 core with BIOS ,
But I don't have an Debugger . I just print the message by UART.
So how can I confirm the ISR processing really happens.
Thanks!
Why don't you just set a flag in memory that tells you the ISR processing really happened? That's what I would do if I didn't have a debugger
Judah
I print statements in my ISR.
Now I haved an infinte loop wait for the GPIO_IRQSTATUS_0.Itsees it can detect the GPIO_IRQSTATUS_0 value. But I have to trigger twice to run out the ISR.
The first trigger will dead in the loop.Then the second trigger will finish the ISR.
But when I only read the register then print it ,the value is always zero.Therefore I think there is a mechanism that auto clear the value.(Maybe in the linux gpio driver or BIos Hwi or my code is wrong ) How can I verify this thing.
My ISR as follow , I configure it GPIO2-10 whit rising edge trigger.
void GPIO_hwi_handle(UArg arg)
{
Vps_printf("\n start ISR\n");
uint32 sts = 0;
while((sts=REG32(GPIO2 + GPIO_IRQSTATUS_0))==0)
;
/*78 is the interrupt number for M3 and the interrupt is GPIO2 Interrupt 0*/
Hwi_disableInterrupt(78);
Vps_printf("\n---GPIO_IRQSTATUS_0= 0X%08X---\n",sts);
Vps_printf("\n end ISR\n");
REG32(GPIO2 + GPIO_IRQSTATUS_0)=(1<<10);
Hwi_clearInterrupt(78);
Hwi_enableInterrupt(78);
}
I know BIOS is not clearing any GPIO status bits. You will need to debug with breakpionts.
Judah