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TMS320C6747 Premature aging of IO Buffer

Guy Caron
Prodigy 105 points

I have some questions relative to this failure:

  1. Are the buffers affected only when in Output mode? The EMIFB clock out is the first to go, but if we use a fast clock IN on the MCASP, is this signal also at risk?
  2. When the EMIF clock chip start to fail does that cause (or should we assume) colateral damage to other parts of the chip? Put another way: Once a chip start to fail on EMIFB CLK out, is it still 'salvageable' if we stop using the EMIFB access? I have 5 units from a batch of 30 made a couple years ago [running 24/7, EMIFB@100MHz] that started to behave 'strangely', usually ending in a USB disconnect and reset. One of these units was kept running a few months after it started to fail. It now fails the most basic SDRAM test [The emulator can't load code there either]. That unit also seem to have USB problem when running a test program exclusively from internal memory.
  3. Are the USB IO pins subject to the same premature aging issue?
  4. In your testing of this issue, were the parts that started to fail working for some time after a power down? In my case, I have units that will work for weeks after being turned off a few days. The problem will then come back on some units. Did you get the same behaviour or could this be a different problem?
  5. Will the new Silicon revision 3.0 expected in 2Q2013 also correct/improve the 1.2V oscillator circuit to reduce the need to use an external oscillator [Erratum section 2.1.4 ESD Immunity]? We are in the process of updating our design and I will put the external oscillator there if the 3.0 does not improve on this.
  • 0
    TI__Expert 7470 points

    Guy,

    Please find my responses to your questions below.

    • Are the buffers affected only when in Output mode? The EMIFB clock out is the first to go, but if we use a fast clock IN on the MCASP, is this signal also at risk?

    [Sunil]: Only output I/O buffers are affected. Slower speed interfaces will have a longer lifetime before causing system fails due to system timing margins and slower toggle rates. The latest device errata should give you some indication of how this issue affects I/O for McASP speeds. Please get in touch with your local TI or distributor reps for a more complete analysis.

    • When the EMIF clock chip start to fail does that cause (or should we assume) colateral damage to other parts of the chip? Put another way: Once a chip start to fail on EMIFB CLK out, is it still 'salvageable' if we stop using the EMIFB access? I have 5 units from a batch of 30 made a couple years ago [running 24/7, EMIFB@100MHz] that started to behave 'strangely', usually ending in a USB disconnect and reset. One of these units was kept running a few months after it started to fail. It now fails the most basic SDRAM test [The emulator can't load code there either]. That unit also seem to have USB problem when running a test program exclusively from internal memory.

    [Sunil] No, this is not the case. An affected I/O buffer will not cause other I/O buffers to fail.

    • Are the USB IO pins subject to the same premature aging issue?

    [Sunil]: USB I/O pins are NOT affected by the premature aging issue.

    • In your testing of this issue, were the parts that started to fail working for some time after a power down? In my case, I have units that will work for weeks after being turned off a few days. The problem will then come back on some units. Did you get the same behaviour or could this be a different problem?

    [Sunil]: Once the buffer has started failing, it doesn’t get better.  That said, if it’s JUST starting to fail, i.e. the signal integrity is degraded but only slightly, you may get marginal performance where you get some pass, some fail.  But this is because you may be right on the edge of your timing margin; the buffer performance never really improves once it’s started to fail.

    • Will the new Silicon revision 3.0 expected in 2Q2013 also correct/improve the 1.2V oscillator circuit to reduce the need to use an external oscillator [Erratum section 2.1.4 ESD Immunity]? We are in the process of updating our design and I will put the external oscillator there if the 3.0 does not improve on this.

    [Sunil]: Silicon revision 3.0 will only fix the premature aging issue.

    Please get in touch with your local TI or distributor field reps for further assistance.

    Regards,

    Sunil Kamath