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DSPLINK PROC_attach() error with 1GBytes of RAM

Other Parts Discussed in Thread: DM3725, OMAP3530

Hello,

We are developing two products with DM3725: one with 512MBytes and the other with 1GBytes (both POP LPDDR2). The products are pretty the same, using the same Linux kernel 2.6.32 using DSPLink version 1.65.00.03 with PROC and NOTIFY components. Linux sees only the first 128MByte of RAM on both products. The other is reserved for DSP. So it is 384MBytes and 896MBytes.

The ARM application that load the DSP binary passes the DSP configuration to the DSPLink during the PROC_setup(). On both products the PROC_setup () succeeds. But the PROC_attach() fails on the device with 1GBytes of RAM, while it works perfectly on the device with 512MBytes and on the device with 1GBytes, but with the same configuration as the 512MBytes. The error code is 0x8000800c (DSP_EMEMORY). Memory test shows that 1GBytes of RAM works correctly under Linux.

This is the configuration for 1GBytes device passed to PROC_attach(). The only change for 512MByte:

For 512MByte:

#define  SHAREDMEMORYSIZE1  (0x18000000 - (RESETCTRLSIZE + CODEMEMORYSIZE + SHAREDMEMORYSIZE0))

For 1GByte

#define  SHAREDMEMORYSIZE1  (0x18000000 - (RESETCTRLSIZE + CODEMEMORYSIZE + SHAREDMEMORYSIZE0))

Below there is the DSPLink trace.

Does anyone has a clue of what's going on?

/** ============================================================================
 *  @file   CFG_OMAP3530_SHMEM.c
 *
 *  @path   $(DSPLINK)/config/all/
 *
 *  @desc   Defines the configuration information for DSP/BIOS LINK for the
 *          OMAP platform.
 *
 *  @ver    1.61
 *  ============================================================================
 *  Copyright (c) Texas Instruments Incorporated 2002-2008
 *
 *  Use of this software is controlled by the terms and conditions found in the
 *  license agreement under which this software has been supplied or provided.
 *  ============================================================================
 */


/*  ----------------------------------- DSP/BIOS LINK Headers       */
#include <dsplink.h>
#include <procdefs.h>

#if defined (__cplusplus)
EXTERN "C" {
#endif /* defined (__cplusplus) */

extern LINKCFG_Gpp LINKCFG_gppObject ;

/** ============================================================================
 *                                DSPLINK MEMORY SECTION DIAGRAM
 *
 *         |--------------[ 0xXXXXXX00 ]---------------------------------|
 *         |                                                             |
 *         |                   RESET VECTOR (0x80)                       |
 *         |               Last two nibbles must be zero                 |
 *         |                                                             |
 *         |-------------------------------------------------------------|
 *         |                                                             |
 *         |                   DSP CODE/DATA                             |
 *         |               DSP executable is loaded to this section      |
 *         |                                                             |
 *         |=============================================================|
 *         |                                                             |
 *         |                   DSPLINK SHARED MEMORY0                    |
 *         |               Shared control structure is loaded here       |
 *         |                                                             |
 *         |-------------------------------------------------------------|
 *         |                                                             |
 *         |                   DSPLINK SHARED MEMORY1                    |
 *         |               Shared control structure is loaded here       |
 *         |                                                             |
 *         |-------------------------------------------------------------|
 *
 *  ============================================================================
 */

/** ============================================================================
 *  @name   DRVHANDSHAKEPOLLCOUNT
 *
 *  @desc   POLL Count for Driver handshake.
 *  ============================================================================
 */
#define  DRVHANDSHAKEPOLLCOUNT        ((Uint32) 0xFFFFFFFu)

/** ============================================================================
 *  @name   RESETCTRLADDR
 *
 *  @desc   Indicates the start address of Reset Ctrl memory region.
 *          last two nibbles must be zero i.e. align to 256 boundary.
 *  ============================================================================
 */
#define  RSTENTRYID         0u
#define  RESETCTRLADDR      0x88000000
#define  RESETCTRLSIZE      0x80u

/** ============================================================================
 *  @name   CODEMEMORYADDR/CODEMEMORYSIZE
 *
 *  @desc   Indicates startaddress/size for dsplink code region.
 *  ============================================================================
 */
#define  CODEENTRYID        1u
#define  CODEMEMORYADDR     (RESETCTRLADDR + RESETCTRLSIZE)
#define  CODEMEMORYSIZE     0xFEF80u

/** ============================================================================
 *  @name   SHAREDENTRYID/SHAREDMEMORYADDR/SHAREDMEMORYSIZE
 *
 *  @desc   Indicates startaddress/size for dsplink shared memory region.
 *  ============================================================================
 */
#define  SHAREDENTRYID0     2u
#define  SHAREDMEMORYADDR0  (CODEMEMORYADDR + CODEMEMORYSIZE)
#define  SHAREDMEMORYSIZE0  0x11000u

/** ============================================================================
 *  @name   SHAREDENTRYID/SHAREDMEMORYADDR/SHAREDMEMORYSIZE
 *
 *  @desc   Indicates startaddress/size for dsplink shared memory region.
 *  ============================================================================
 */
#define  SHAREDENTRYID1     3u
#define  SHAREDMEMORYADDR1  (SHAREDMEMORYADDR0 + SHAREDMEMORYSIZE0)
#define  SHAREDMEMORYSIZE1  (0x38000000 - (RESETCTRLSIZE + CODEMEMORYSIZE + SHAREDMEMORYSIZE0))



/** ============================================================================
 *  @name   FXMEMORYADDR/FXMEMORYSIZE
 *
 *  @desc   Indicates startaddress/size for dsplink FX memory region.
 *  ============================================================================
 */
/*
 * FX section is not necessary: it can be taken from shared area
#define  FXENTRYID          4u
#define  FXMEMORYADDR       (SHAREDMEMORYADDR1 + SHAREDMEMORYSIZE1)
#define  FXMEMORYSIZE       DSP_FXSIZE
*/


/** ============================================================================
 *  @name   POOLMEMORYADDR/POOLMEMORYSIZE
 *
 *  @desc   Indicates startaddress/size for dsplink POOL memory region.
 *  ============================================================================
 */
/*
 * POOL component is not used
#define  POOLENTRYID        5u
#define  POOLMEMORYADDR     (FXMEMORYADDR + FXMEMORYSIZE)
#define  POOLMEMORYSIZE     0x000D0000u
*/


/** ============================================================================
 *  @name   LINKCFG_memTable_00
 *
 *  @desc   Memory table ID 0.
 *  ============================================================================
 */
STATIC LINKCFG_MemEntry  LINKCFG_memTable_00 [] =
{
    {
        RSTENTRYID,                        /* ENTRY          : Entry number */
        "RESETCTRL",                       /* NAME           : Name of the memory region */
        RESETCTRLADDR,                     /* ADDRPHYS       : Physical address */
        RESETCTRLADDR,                     /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1u,                      /* ADDRGPPVIRT    : GPP virtual address (if known) */
        RESETCTRLSIZE,                     /* SIZE           : Size of the memory region */
        TRUE,                              /* SHARED         : Shared access memory? */
        FALSE,                             /* SYNCD          : Synchornized? */
    },
    {
        CODEENTRYID,                       /* ENTRY          : Entry number */
        "DDR2",                            /* NAME           : Name of the memory region */
        CODEMEMORYADDR,                    /* ADDRPHYS       : Physical address */
        CODEMEMORYADDR,                    /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1u,                      /* ADDRGPPVIRT    : GPP virtual address (if known) */
        CODEMEMORYSIZE,                    /* SIZE           : Size of the memory region */
        TRUE,                              /* SHARED         : Shared access memory? */
        FALSE,                             /* SYNCD          : Synchornized? */
    },
    {
        SHAREDENTRYID0,                   /* ENTRY          : Entry number */
        "DSPLINKMEM",                     /* NAME           : Name of the memory region */
        SHAREDMEMORYADDR0,                /* ADDRPHYS       : Physical address */
        SHAREDMEMORYADDR0,                /* ADDRDSPVIRT    : DSP virtual address */
       (Uint32) -1u,                      /* ADDRGPPVIRT    : GPP virtual address (if known) */
        SHAREDMEMORYSIZE0,                /* SIZE           : Size of the memory region */
        TRUE,                             /* SHARED         : Shared access memory? */
        FALSE,                            /* SYNCD          : Synchornized? */
    },
    {
        SHAREDENTRYID1,                   /* ENTRY          : Entry number */
        "DSPLINKMEM1",                    /* NAME           : Name of the memory region */
        SHAREDMEMORYADDR1,                /* ADDRPHYS       : Physical address */
        SHAREDMEMORYADDR1,                /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1u,                     /* ADDRGPPVIRT    : GPP virtual address (if known) */
        SHAREDMEMORYSIZE1,                /* SIZE           : Size of the memory region */
        TRUE,                             /* SHARED         : Shared access memory? */
        FALSE,                            /* SYNCD          : Synchornized? */
    },
    {
        4,                     /* ENTRY          : Entry number */
        "DSPIRAM",             /* NAME           : Name of the memory region */
        0x5c7f8000,            /* ADDRPHYS       : Physical address */
        0x107f8000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x00018000,            /* SIZE           : Size of the memory region */
        TRUE,                  /* SHARED         : Shared access memory? */
        FALSE                  /* SYNCD          : Synchornized? */
    },
    {
        5,                     /* ENTRY          : Entry number */
        "DSPL1PRAM",           /* NAME           : Name of the memory region */
        0x5cE00000,            /* ADDRPHYS       : Physical address */
        0x10E00000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x00008000,            /* SIZE           : Size of the memory region */
        TRUE,                  /* SHARED         : Shared access memory? */
        FALSE                  /* SYNCD          : Synchornized? */
    },
    {
        6,                     /* ENTRY          : Entry number */
        "DSPL1DRAM",           /* NAME           : Name of the memory region */
        0x5cF04000,            /* ADDRPHYS       : Physical address */
        0x10F04000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x00014000,            /* SIZE           : Size of the memory region */
        TRUE,                  /* SHARED         : Shared access memory? */
        FALSE                  /* SYNCD          : Synchornized? */
    },
    {
        7,                     /* ENTRY          : Entry number */
        "L4_CORE",             /* NAME           : Name of the memory region */
        0x48000000,            /* ADDRPHYS       : Physical address */
        0x48000000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x01000000,            /* SIZE           : Size of the memory region */
        FALSE,                 /* SHARED         : Shared access memory? */
        FALSE                  /* SYNCD          : Synchornized? */
    },
    {
        8,                     /* ENTRY          : Entry number */
        "L4_PER",              /* NAME           : Name of the memory region */
        0x49000000,            /* ADDRPHYS       : Physical address */
        0x49000000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x00100000,            /* SIZE           : Size of the memory region */
        FALSE,                 /* SHARED         : Shared access memory? */
        FALSE                  /* SYNCD          : Synchornized? */
    },
} ;

/** ============================================================================
 *  @name   LINKCFG_memTables
 *
 *  @desc   Array of memory tables in the system.
 *  ============================================================================
 */
STATIC LINKCFG_MemEntry * LINKCFG_memTables [] =
{
    LINKCFG_memTable_00        /* Memory Table 0 */
} ;

/** ============================================================================
 *  @name   LINKCFG_ipsTable_00
 *
 *  @desc   IPS table ID 0.
 *  ============================================================================
 */
STATIC LINKCFG_Ips  LINKCFG_ipsTable_00 [] =
{
    {
        "IPS",                 /* NAME           : Name of the Inter-Processor-Signaling component */
        (Uint32) 32,           /* NUMIPSEVENTS   : Number of IPS events to be supported */
        SHAREDENTRYID0,        /* MEMENTRY       : Memory entry ID (-1 if not needed) */
        (Uint32) 26,           /* GPPINTID       : Interrupt no. to used by the IPS on GPP-side. (-1 if uni-directional to DSP) */
        (Uint32) 55,           /* DSPINTID       : Interrupt no. to used by the IPS on DSP-side. (-1 if uni-directional to GPP) */
        (Uint32) 5,            /* DSPINTVECTORID : Interrupt vector no. to used by the IPS on DSP-side. (-1 if uni-directional to GPP) */
        (Uint32) 50000000,     /* ARGUMENT1      : Poll value for which IPS waits while sending event (-1 if infinite) */
        0                      /* ARGUMENT2      : Second IPS-specific argument */
    }
} ;

/** ============================================================================
 *  @name   LINKCFG_ipsTables
 *
 *  @desc   Array of IPS tables in the system.
 *  ============================================================================
 */
STATIC LINKCFG_Ips * LINKCFG_ipsTables [] =
{
    LINKCFG_ipsTable_00        /* IPS Table 0 */
} ;

/** ============================================================================
 *  @name   LINKCFG_poolTable_00
 *
 *  @desc   Pool table ID 0.
 *  ============================================================================
 */
STATIC LINKCFG_Pool  LINKCFG_poolTable_00 [] =
{
    {
        "SMAPOOL",             /* NAME           : Name of the pool */
        (Uint32) -1,           /* MEMENTRY       : Memory entry ID (-1 if not needed) */
        (Uint32) -1,           /* POOLSIZE       : Size of the pool (-1 if not needed) */
        (Uint32) -1,           /* IPSID          : ID of the IPS used */
        (Uint32) -1,           /* IPSEVENTNO     : IPS Event number associated with POOL */
        (Uint32) -1,           /* POOLMEMENTRY   : Pool memory region section ID  */
        0x0,                   /* ARGUMENT1      : First Pool-specific argument */
        0x0                    /* ARGUMENT2      : Second Pool-specific argument */
    }
} ;

/** ============================================================================
 *  @name   LINKCFG_poolTables
 *
 *  @desc   Array of Pool tables in the system.
 *  ============================================================================
 */
STATIC LINKCFG_Pool * LINKCFG_poolTables [] =
{
    LINKCFG_poolTable_00       /* Pool Table 0 */
} ;

/** ============================================================================
 *  @name   LINKCFG_dataTable_00
 *
 *  @desc   Data driver table ID 0.
 *  ============================================================================
 */
STATIC LINKCFG_DataDrv  LINKCFG_dataTable_00 [] =
{
    {
        "ZCPYDATA",            /* NAME           : Name of the data driver */
        0,                     /* BASECHANNELID  : Base channel ID for the driver */
        16,                    /* NUMCHANNELS    : Number of channels supported */
        16384,                 /* MAXBUFSIZE     : Maximum size of buffer supported (-1 if no limit) */
        (Uint32) -1,           /* MEMENTRY       : Memory entry ID (-1 if not needed) */
        0,                     /* POOLID         : Pool id for allocating buffers */
        1,                     /* QUEUELENGTH    : Queue length for the data driver */
        0,                     /* IPSID          : ID of the IPS used */
        1,                     /* IPSEVENTNO     : IPS Event number associated with data Driver */
        0x0,                   /* ARGUMENT1      : First data driver specific argument */
        0x0                    /* ARGUMENT2      : Second data driver specific argument */
    }
} ;

/** ============================================================================
 *  @name   LINKCFG_dataTables
 *
 *  @desc   Array of Data driver tables in the system.
 *  ============================================================================
 */
STATIC LINKCFG_DataDrv * LINKCFG_dataTables [] =
{
    LINKCFG_dataTable_00       /* Data Table 0 */
} ;

/** ============================================================================
 *  @name   LINKCFG_mqtObjects
 *
 *  @desc   Array of Message Queue Transport objects in the system.
 *  ============================================================================
 */
STATIC LINKCFG_Mqt  LINKCFG_mqtObjects [] =
{
    {
        "ZCPYMQT",             /* NAME           : Name of the Message Queue Transport */
        (Uint32) -1,           /* MEMENTRY       : Memory entry ID (-1 if not needed) */
        (Uint32) -1,           /* MAXMSGSIZE     : Maximum message size supported (-1 if no limit) */
        0,                     /* IPSID          : ID of the IPS used */
        0,                     /* IPSEVENTNO     : IPS Event number associated with MQT */
        0x0,                   /* ARGUMENT1      : First MQT-specific argument */
        0x0                    /* ARGUMENT2      : Second MQT-specific argument */
    }
} ;

/** ============================================================================
 *  @name   LINKCFG_ringIoObjects
 *
 *  @desc   Array of RINGIO objects in the system.
 *  ============================================================================
 */
STATIC LINKCFG_RingIo  LINKCFG_ringIoObjects [] =
{
    {
        "RINGIOTABLE",         /* NAME           : Name of the RingIO Table */
        (Uint32) -1,           /* MEMENTRY       : Memory entry ID (-1 if not needed) */
        64,                    /* NUMENTRIES     : Number of RingIO entries supported */
        0,                     /* IPSID          : ID of the IPS used */
        2                      /* IPSEVENTNO     : IPS Event number associated with RingIO */
    }
} ;

/** ============================================================================
 *  @name   LINKCFG_mplistObjects
 *
 *  @desc   Array of MPLIST objects in the system.
 *  ============================================================================
 */
STATIC LINKCFG_MpList  LINKCFG_mplistObjects [] =
{
    {
        "MPLISTTABLE",         /* NAME           : Name of the MpList Table */
        (Uint32) -1,           /* MEMENTRY       : Memory entry ID (-1 if not needed) */
        64,                    /* NUMENTRIES     : Number of MpList entries supported */
        (Uint32) -1,           /* IPSID          : ID of the IPS used */
        (Uint32) -1            /* IPSEVENTNO     : IPS Event number associated with MpList */
    }
} ;

/** ============================================================================
 *  @name   LINKCFG_mpcsObjects
 *
 *  @desc   Array of MPCS objects in the system.
 *  ============================================================================
 */
STATIC LINKCFG_Mpcs  LINKCFG_mpcsObjects [] =
{
    {
        "MPCS",                /* NAME           : Name of the MPCS Table */
        (Uint32) -1,           /* MEMENTRY       : Memory entry ID (-1 if not needed) */
        256,                   /* NUMENTRIES     : Number of MPCS entries supported */
        (Uint32) -1,           /* IPSID          : ID of the IPS used */
        (Uint32) -1            /* IPSEVENTNO     : IPS Event number associated with MPCS */
    }
} ;

/** ============================================================================
 *  @name   LINKCFG_logObject
 *
 *  @desc   Configuration object for the GPP.
 *  ============================================================================
 */
STATIC LINKCFG_Log  LINKCFG_logObject = {
    FALSE,             /* GDMSGQPUT         : GPP->DSP MSG Transfer  - MSGQ_put call */
    FALSE,             /* GDMSGQSENDINT     : GPP->DSP MSG Transfer  - GPP sends interrupt */
    FALSE,             /* GDMSGQISR         : GPP->DSP MSG Transfer  - DSP receives interrupt */
    FALSE,             /* GDMSGQQUE         : GPP->DSP MSG Transfer  - Message queued at DSP */
    FALSE,             /* DGMSGQPUT         : DSP->GPP MSG Transfer  - MSGQ_put call */
    FALSE,             /* DGMSGQSENDINT     : DSP->GPP MSG Transfer  - DSP sends interrupt */
    FALSE,             /* DGMSGQISR         : DSP->GPP MSG Transfer  - GPP receives interrupt */
    FALSE,             /* DGMSGQQUE         : DSP->GPP MSG Transfer  - Message queued at GPP */
    FALSE,             /* GDCHNLISSUESTART  : GPP->DSP CHNL Transfer - Entering inside ISSUE call */
    FALSE,             /* GDCHNLISSUEQUE    : GPP->DSP CHNL Transfer - ISSUE: Buffer is queued in internal structure on GPP */
    FALSE,             /* GDCHNLISSUECOMPL  : GPP->DSP CHNL Transfer - ISSUE call completed */
    FALSE,             /* GDCHNLXFERSTART   : GPP->DSP CHNL Transfer - Initiating a buffer transfer by GPP */
    FALSE,             /* GDCHNLXFERPROCESS : GPP->DSP CHNL Transfer - Actual transfer of buffer is going to take place */
    FALSE,             /* GDCHNLXFERCOMPL   : GPP->DSP CHNL Transfer - Buffer transfer is complete */
    FALSE,             /* GDCHNLRECLSTART   : GPP->DSP CHNL Transfer - Entering RECLAIM call */
    FALSE,             /* GDCHNLRECLPEND    : GPP->DSP CHNL Transfer - RECLAIM: Wait on a semaphore */
    FALSE,             /* GDCHNLRECLPOST    : GPP->DSP CHNL Transfer - RECLAIM: Posting the Semaphore */
    FALSE,             /* GDCHNLRECLCOMPL   : GPP->DSP CHNL Transfer - RECLAIM call completed */
    FALSE,             /* DGCHNLISSUEQUE    : DSP->GPP CHNL Transfer - ISSUE: Buffer is queued in internal structure on DSP */
    FALSE,             /* DGCHNLXFERSTART   : DSP->GPP CHNL Transfer - Initiating a buffer transfer by DSP */
    FALSE,             /* DGCHNLXFERPROCESS : DSP->GPP CHNL Transfer - Actual transfer of buffer is going to take place */
    FALSE,             /* DGCHNLXFERCOMPL   : DSP->GPP CHNL Transfer - Buffer transfer is complete */
    FALSE,             /* DGCHNLRECLPEND    : DSP->GPP CHNL Transfer - RECLAIM: Wait on a semaphore */
    FALSE,             /* DGCHNLRECLPOST    : DSP->GPP CHNL Transfer - RECLAIM: Posting the Semaphore */
    10,                /* MSGIDRANGESTART   : MSG ID range: lower limit */
    20                 /* MSGIDRANGEEND     : MSG ID range: upper limit */
} ;

/** ============================================================================
 *  @name   LINKCFG_linkDrvObjects
 *
 *  @desc   Array of Link driver objects in the system.
 *  ============================================================================
 */
STATIC LINKCFG_LinkDrv  LINKCFG_linkDrvObjects [] =
{
    {
        "SHMDRV",                                                 /* NAME           : Name of the link driver */
        DRVHANDSHAKEPOLLCOUNT,                                    /* HSHKPOLLCOUNT  : Poll value for which handshake waits (-1 if infinite) */
        (Uint32) SHAREDENTRYID1,                                  /* MEMENTRY       : Memory entry ID (-1 if not needed) */
        0,                                                        /* IPSTABLEID     : ID of the IPS table used */
        sizeof (LINKCFG_ipsTable_00) / sizeof (LINKCFG_Ips),      /* IPSENTRIES     : Number of IPS supported */
        0,                                                        /* POOLTABLEID    : ID of the POOL table */
        0,                                                        /* NUMPOOLS       : Number of POOLs supported */
        0,                                                        /* DATATABLEID    : ID of the data driver table */
        sizeof (LINKCFG_dataTable_00) / sizeof (LINKCFG_DataDrv), /* NUMDATADRV     : Number of data drivers supported */
        0,                                                        /* MQTID          : ID of the MQT */
        0,                                                        /* RINGIOTABLEID  : RingIO Table Id used for this DSP */
        0,                                                        /* MPLISTTABLEID  : MpList Table Id used for this DSP */
        0                                                         /* MPCSTABLEID    : MPCS Table ID used for this DSP */
    },
} ;

/** ============================================================================
 *  @name   LINKCFG_dspObjects
 *
 *  @desc   Array of configuration objects for the DSPs in the system.
 *  ============================================================================
 */
STATIC LINKCFG_Dsp  LINKCFG_dspObject =
{
    "OMAP3530",                                              /* NAME           : Name of the DSP */
    DspArch_C64x,                                            /* ARCHITECTURE   : DSP architecture */
    "COFF",                                                  /* LOADERNAME     : Name of the DSP executable loader */
    FALSE,                                                   /* AUTOSTART      : Autostart the DSP (Not supported) */
    "DEFAULT.OUT",                                           /* EXECUTABLE     : Executable for autostart */
    DSP_BootMode_Boot_NoPwr,                                 /* DODSPCTRL      : Link does boot mode dependent DSP control */
    RESETCTRLADDR,                                           /* RESUMEADDR     : Resume address */
    RESETCTRLADDR,                                           /* RESETVECTOR    : Reset Vector for the DSP */
    RESETCTRLSIZE,                                           /* RESETCODESIZE  : Size of code at DSP Reset Vector */
    1,                                                       /* MADUSIZE       : DSP Minimum Addressable Data Unit */
    891000,                                                  /* CPUFREQ        : DSP Frequency (in KHz) */
    Endianism_Little,                                        /* ENDIAN         : DSP Endianism */
    FALSE,                                                   /* WORDSWAP       : Words must be swapped when writing to memory */
    0,                                                       /* MEMTABLEID     : ID of the memory table used */
    sizeof (LINKCFG_memTable_00)/sizeof (LINKCFG_MemEntry),  /* MEMENTRIES     : Number of entries in memory table */
    0,                                                       /* LINKDRVID      : ID of the link driver used */
    -1,                                                      /* ARG1           : Bus No of PCI card */
    -1,                                                      /* ARG2           : Slot No of PCI card */
    0,                                                       /* ARG3           : Shared memory interface */
    0,                                                       /* ARG4           : Physical interface 1-pci 2-vlynq*/
    (Uint32) -1l                                             /* ARG5           : EDMA channel number,  Unused  for OMAP*/
} ;

/** ============================================================================
 *  @name   MyDSPMem_Config
 *
 *  @desc   DSP/BIOS LINK configuration structure.
 *  ============================================================================
 */
LINKCFG_DspConfig  MyDSPMem_Config = {
    (LINKCFG_Dsp *)       &LINKCFG_dspObject,                   /* DSPOBJECTS     : Array of DSP objects */
    sizeof (LINKCFG_linkDrvObjects)/sizeof (LINKCFG_LinkDrv),   /* NUMLINKDRVS    : Number of Link Drviers*/
    (LINKCFG_LinkDrv *)   LINKCFG_linkDrvObjects,               /* LINKDRVOBJECTS : Array of Link Driver objects */
    sizeof (LINKCFG_memTables)/sizeof (LINKCFG_MemEntry *),     /* NUMMEMTABLES   : Number of memory tables */
    (LINKCFG_MemEntry **) LINKCFG_memTables,                    /* MEMTABLES      : Array of Memory tables */
    sizeof (LINKCFG_ipsTables)/sizeof (LINKCFG_Ips *),          /* NUMIPSTABLES   : Number of IPS tables */
    (LINKCFG_Ips **)      LINKCFG_ipsTables,                    /* IPSTABLES      : Array of IPS tables */
    sizeof (LINKCFG_poolTables)/sizeof (LINKCFG_Pool *),        /* NUMPOOLTABLES  : Number of POOL tables */
    (LINKCFG_Pool **)     LINKCFG_poolTables,                   /* POOLTABLES     : Array of Pool tables */
    sizeof (LINKCFG_dataTables)/sizeof (LINKCFG_DataDrv *),     /* NUMDATATABLES  : Number of data tables */
    (LINKCFG_DataDrv **)  LINKCFG_dataTables,                   /* DATATABLES     : Array of data tables */
    sizeof (LINKCFG_mqtObjects)/sizeof (LINKCFG_Mqt),           /* NUMMQTS        : Number of MQTs */
    (LINKCFG_Mqt *)       LINKCFG_mqtObjects,                   /* MQTOBJECTS     : Array of MQT objects */
    sizeof (LINKCFG_ringIoObjects)/sizeof (LINKCFG_RingIo),     /* NUMRINGIOTABLES: Number of RINGIO tables */
    (LINKCFG_RingIo *)    LINKCFG_ringIoObjects,                /* RINGIOOBJECTS  : Array of RINGIO objects */
    sizeof (LINKCFG_mplistObjects)/sizeof (LINKCFG_MpList),     /* NUMMPLISTTABLES: Number of MPLIST tables */
    (LINKCFG_MpList *)    LINKCFG_mplistObjects,                /* MPLISTOBJECTS  : Array of MPLIST objects */
    sizeof (LINKCFG_mpcsObjects)/sizeof (LINKCFG_Mpcs),         /* NUMMPCSTABLES  : Number of MPCS tables */
    (LINKCFG_Mpcs *)      LINKCFG_mpcsObjects,                  /* MPCSOBJECTS    : Array of MPCS objects */
    (LINKCFG_Log *)       &LINKCFG_logObject,                   /* LOGOBJECT      : Pointer to LOG object */
} ;

//-------------------------------------
/*
LINKCFG_Gpp

typedef struct LINKCFG_Gpp_tag {
    Char8              name [DSP_MAX_STRLEN] ;
    Uint32             maxMsgqs ;
    Uint32             maxChnlQueue ;
    Uint32             poolTableId ;
    Uint32             numPools ;
    LINKCFG_GppOs *    gppOsObject ;
} LINKCFG_Gpp

*/

LINKCFG_Object LINKCFG_myConfig =
{
  &LINKCFG_gppObject,
  {&MyDSPMem_Config, }
};


#if defined (__cplusplus)
}
#endif /* defined (__cplusplus) */

*** DSPLink trace ***

Entered PROC_setup ()
        linkCfg [0xc66d30]
Entered DRV_Initialize ()
        drvObj  [0xc90b9c]
        arg     [0x0]
Leaving DRV_Initialize ()       status [0x8000]
Entered DRV_ProtectInit ()
        drvObj  [0xd13970]
Leaving DRV_ProtectInit ()      status [0x8000]
Entered DRV_ProtectEnter ()
        drvObj  [0xd13970]
Leaving DRV_ProtectEnter ()     status [0x8000]
Entered DRV_Invoke ()
        drvObj  [0xd13970]
        cmdId   [0xc018e011]
        arg1    [0xbe940a58]
        arg2    [0x0]
Entered DRV_installCleanupRoutines ()
        linkCfgPtr      [0xc66d30]
Leaving DRV_installCleanupRoutines ()
osStatus: 0
Status: 8000
Leaving DRV_Invoke ()   status [0x8000]
Entered _MEM_USR_init ()
Leaving _MEM_USR_init ()        status [0x8000]
Entered _IDM_USR_init ()
Entered DRV_Invoke ()
        drvObj  [0xd13970]
        cmdId   [0xc018e053]
        arg1    [0xbe940a2c]
        arg2    [0x0]
Status: 8000
Leaving DRV_Invoke ()   status [0x8000]
Leaving _IDM_USR_init ()        status [0x8000]
Entered _SYNC_USR_init ()
Entered _IDM_USR_create ()
        key     [0x10080]
        attrs   [0xbe940a34]
Entered DRV_Invoke ()
        drvObj  [0xd13970]
        cmdId   [0xc018e055]
        arg1    [0xbe940a0c]
        arg2    [0x0]
Status: 8000
Leaving DRV_Invoke ()   status [0x8000]
Leaving _IDM_USR_create ()      status [0x8000]
Leaving _SYNC_USR_init ()       status [0x8000]
Entered _SYNC_USR_createCS ()
        idKey   [0xa91230]
        csObj   [0xc90ba4]
Entered _IDM_USR_acquireId ()
        key     [0x10080]
        idKey   [0xa91230]
        id      [0xbe940a38]
Entered DRV_Invoke ()
        drvObj  [0xd13970]
        cmdId   [0xc018e057]
        arg1    [0xbe940a0c]
        arg2    [0x0]
Status: 8000
Leaving DRV_Invoke ()   status [0x8000]
Leaving _IDM_USR_acquireId ()   status [0x8000]
Leaving _SYNC_USR_createCS ()   status [0x8000]
Entered DRV_ProtectLeave ()
        drvObj  [0xd13970]
Leaving DRV_ProtectLeave ()     status [0x8000]
Entered PROC_resetCurStatus ()
Leaving PROC_resetCurStatus ()
Leaving PROC_setup ()   status [0x8000]
Entered PROC_attach ()
        procId  [0x0]
        attr    [0x0]
Entered DRV_Initialize ()
        drvObj  [0xc90b9c]
        arg     [0x0]
Entered _SYNC_USR_enterCS ()
        csObj   [0xd13988]
Leaving _SYNC_USR_enterCS ()    status [0x8000]
Entered _SYNC_USR_leaveCS ()
        csObj   [0xd13988]
Leaving _SYNC_USR_leaveCS ()    status [0x8000]
Leaving DRV_Initialize ()       status [0x8000]
Entered _SYNC_USR_enterCS ()
        csObj   [0xd13988]
Leaving _SYNC_USR_enterCS ()    status [0x8000]
Entered DRV_Invoke ()
        drvObj  [0xd13970]
        cmdId   [0xc018e018]
        arg1    [0xbe940a54]
        arg2    [0x0]
Status: 8000800c
Leaving DRV_Invoke ()   status [0x8000800c]
Entered _SYNC_USR_leaveCS ()
        csObj   [0xd13988]
Leaving _SYNC_USR_leaveCS ()    status [0x8000]
Leaving PROC_attach ()  status [0x8000800c]
PROC_attach () failed. Status = [0x8000800c]
Operation failed due to memory error.
Entered DSPLINK_atExitHandler ()

  • I've realized that kernel printk were disabled. I have a new log message, it seems much more like before, but what seems to be very relevant is this message from the log just at the beginning:

    Entered PROC_setup ()
            linkCfg [0xc66fe0]
    Entered Dvmap allocation for size 938414080 failed: use vmalloc=<size> to increase size.

    ....

  • No, it can't be. Linux Kernel is configured to use 128MByte of RAM from 0x80000000 to 0x88000000, while DSP and DSPLink memory is starting from 0x88000000 for both 512MByte and 1GByte device. The 1GByte device is working well with 512MByte configuration.

    Linux 512MByte device 1GByte device
    Start Address 0x80000000 0x88000000 0x88000000
    End Address 0x87FFFFFF 0x9FFFFFFF 0xBFFFFFFF
    Length 0x08000000 0x18000000 0x38000000

    Moreover the 512MByte device is working well since several months. The problem arise when you increase the length of DSP memory, while an mmap from Linux user space application works as expected.

    I'm quite sure the point is:

    Entered vmap allocation for size 938414080 failed: use vmalloc=<size> to increase size. Maybe it's related to Linux and not to DSPLink.

  • In the LINKCFG_MemEntry array I've set SHARED = FALSE in the biggest memory section (SHAREDENTRYID1). In this way I have avoided Linux trying to map the memory into the kernel and I don't see the message "vmap allocation failed" anymore. But now I get another error "Entered Configuration error (B): Exceeded maximum number [31] of Translation  Look-aside Buffers."

    The configured entries are:

        Number of entries of size 4KB:  0
        Number of buffers of size 64KB: 0
        Number of buffers of size 1MB:  1
        Number of buffers of size 16MB: 31

    Now since number of available TLB is 32 I'm guessing that I can't access more than 16MBytes * 32 = 512 MBytes using the MMU.

    Can someone confirm, please?

    Is there a simple way of avoiding using MMU on the DSP?

  • Marco,

    You are correct in that the maximum accessible amt by the MMU would be 52 MB.

    Regarding disabling MMU, unfortunately there isn't an easy way to accomplish this/

    I have the following information from the syslink experts:-

    Code for managing the DSP MMU is available here:-

    dsplink/gpp/src/arch/OMAP3530/omap3530_hal_mmu.c

    You could potentially hack this to disable MMU.

    Once the MMU is disabled, all memory accesses are passed through and the DSP would have access to all of RAM, including the parts used by Linux.

    The other option is to try and enable 'page table walking' . Details are here in http://www.ti.com/lit/ug/spruf98x/spruf98x.pdf Section 8, but again, this is not something we have tried. 

  • Thank you for confirming.

    The TRM states that disabling MMU it would not be possible for DMA to access internal memory, so it's not a viable solution.

    So the only possible solution seems to use the 'page table walking'