Other Parts Discussed in Thread: AM1808, OMAP-L138
Hi, we use am1808 + ddr2 on our custom board.
The ddr2 just can't work. We have tried many configurations hard and still failed.
This becomes a bottleneck of bringing up the board.
DDR2 (1Gbits, 16-bit) : K4T1G164QF-BCE6
DDR2 memory controller configurations : see attached excel file
//////////////////////////////
DDR->DDRPHYCTL1 = 0x000000C5;
sdcr = 0x00134832 & ~0x00808000; // no BOOTUNLOCK and TIMUNLOCK
DDR->SDCR = (sdcr | 0x00800000); // set BOOTUNLOCK
DDR->SDCR = (sdcr | 0x00008000); // clear BOOTUNLOCK and set TIMUNLOCK
DDR->SDTIMR1 = 0x2692320A;
DDR->SDTIMR2 = 0x3C94C722;
DDR->SDCR &= (~0x00008000); // clear TIMUNLOCK
//DDR->SDCR2 = 0;
DDR->SDRCR = 0x00000492;
// set ddr2 to sync reset.
SETBIT(DDR->SDRCR, 0xC0000000);
// sync reset the ddr clock.
EVMAM1808_lpscTransition(PSC1, DOMAIN0, LPSC_EMIF3A, PSC_SYNCRESET);
// enable the clock.
EVMAM1808_lpscTransition(PSC1, DOMAIN0, LPSC_EMIF3A, PSC_ENABLE);
// disable self refresh.
CLRBIT(DDR->SDRCR, 0xC0000000);
//////////////////////////////
In CCS memory view, the memory content (start at 0xC0000000) seems very unstable after configuring the memory controller registers.
It looks like the read data in the memory view is a stream scrolling to the left and repeats.
Writing a value to DDR2 address may be shifted (? maybe read problem).
We don't want to give up our board easily.
Please help us check the settings and give suggestions.
Thanks.
Robert
