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DM814x GPIO u-boot

Dear Sirs,
I have some problem with pinout control.

/board/ti/ti8148/evm.c

#define PADCTRL_BASE 0x48140000

#define PAD161_CNTRL  (*(volatile unsigned int *)(PADCTRL_BASE + 0x0A80))         //GP0[15]
#define PAD163_CNTRL  (*(volatile unsigned int *)(PADCTRL_BASE + 0x0A88))         //GP0[17]
#define PAD168_CNTRL  (*(volatile unsigned int *)(PADCTRL_BASE + 0x0A9C))        //GP0[22]
#define PAD009_CNTRL  (*(volatile unsigned int *)(PADCTRL_BASE + 0x0820))         //GP0[2]

#define CVDD_POWER_MNGR0 ( 1<<15 )        // GP0[15]
#define CVDD_POWER_MNGR1 ( 1<<22 )        // GP0[22]
#define CVDD_POWER_MNGR2 ( 1<<17 )        // GP0[17]
#define CVDD_FORSE_POWER ( 1<<2  )        // GP0[2]

int board_init(void)
{
.....

    // GPIO0 CLK Enable
    __raw_writel(0x2, CM_ALWON_GPIO_0_CLKCTRL);
    while(__raw_readl(CM_ALWON_GPIO_0_CLKCTRL) != 0x2);

.....

    val = PAD161_CNTRL;
    PAD161_CNTRL = (volatile unsigned int) (BIT(16) | BIT(7));  //  mux for GPIO, disable pullup, disable input
    val = PAD163_CNTRL;
    PAD163_CNTRL = (volatile unsigned int) (BIT(16) | BIT(7));  //  mux for GPIO, disable pullup, disable input
    val = PAD168_CNTRL;
    PAD168_CNTRL = (volatile unsigned int) (BIT(16) | BIT(7));  //  mux for GPIO, disable pullup, disable input
    val = PAD009_CNTRL;
    PAD009_CNTRL = (volatile unsigned int) (BIT(16) | BIT(7));  //  mux for GPIO, disable pullup, disable input


    // Enable Output on GPIO0
    gpio_reg_val  = __raw_readl(0x48032134);        //0x4803 2134 (GPIO0 Output Enable)
    gpio_reg_val |= ( CVDD_POWER_MNGR0|CVDD_POWER_MNGR1|CVDD_POWER_MNGR2|CVDD_FORSE_POWER );
    __raw_writel(gpio_reg_val, 0x48032134);

    // Clear any existing output data
    gpio_reg_val  = __raw_readl(0x48032190);        //0x4803 2190 (GPIO0 Clear Data Output)
    gpio_reg_val |= ( CVDD_POWER_MNGR0|CVDD_POWER_MNGR1|CVDD_POWER_MNGR2|CVDD_FORSE_POWER );
    __raw_writel(gpio_reg_val, 0x48032190);

    // Program the GPIO to change the voltage
    gpio_reg_val = __raw_readl(0x48032194);        //0x4803 2194 (GPIO0 Set Data Output)
    gpio_reg_val |= (CVDD_POWER_MNGR0 | CVDD_POWER_MNGR2);
    __raw_writel(gpio_reg_val, 0x48032194);   

.....
}

All pins are in 3 state.
Please help me to find out what i have missed.

Thanks.

  • Hi Alex,
     
    Please check the DM814X Datasheet, Tables 4-11 and 4-13 for the values that must be written into the RSV bits 18 and 19 of the PAD_CNTRL registers.
  • Hello Biser
    Thanks for reply.
    I have provided changes, unfortunately it didn't takes affect...
    Source code below:

    /board/ti/ti8148/evm.c

    #define PADCTRL_BASE 0x48140000

    #define PAD161_CNTRL  (*(volatile unsigned int *)(PADCTRL_BASE + 0x0A80))         //GP0[15]
    #define PAD163_CNTRL  (*(volatile unsigned int *)(PADCTRL_BASE + 0x0A88))         //GP0[17]
    #define PAD168_CNTRL  (*(volatile unsigned int *)(PADCTRL_BASE + 0x0A9C))        //GP0[22]
    #define PAD009_CNTRL  (*(volatile unsigned int *)(PADCTRL_BASE + 0x0820))         //GP0[2]

    #define CVDD_POWER_MNGR0 ( 1<<15 )        // GP0[15]
    #define CVDD_POWER_MNGR1 ( 1<<22 )        // GP0[22]
    #define CVDD_POWER_MNGR2 ( 1<<17 )        // GP0[17]
    #define CVDD_FORSE_POWER ( 1<<2  )        // GP0[2]

    int board_init(void)
    {
    .....

        // GPIO0 CLK Enable
        __raw_writel(0x2, CM_ALWON_GPIO_0_CLKCTRL);
        while(__raw_readl(CM_ALWON_GPIO_0_CLKCTRL) != 0x2);

    .....

        val = PAD161_CNTRL;
        PAD161_CNTRL = (volatile unsigned int)           ( BIT(18) | BIT(16) | BIT(7));    //GP0[15]    
        val = PAD163_CNTRL;
        PAD163_CNTRL = (volatile unsigned int)           ( BIT(18) | BIT(16) | BIT(7));    //GP0[17]
        val = PAD168_CNTRL;
        PAD168_CNTRL = (volatile unsigned int)           ( BIT(18) | BIT(16) | BIT(7));    //GP0[22]
        val = PAD009_CNTRL;
        PAD009_CNTRL = (volatile unsigned int)     ( BIT(19) | BIT(18) | BIT(16) | BIT(7));    //GP0[2]


        // Enable Output on GPIO0
        gpio_reg_val  = __raw_readl(0x48032134);        //0x4803 2134 (GPIO0 Output Enable)
        gpio_reg_val |= ( CVDD_POWER_MNGR0|CVDD_POWER_MNGR1|CVDD_POWER_MNGR2|CVDD_FORSE_POWER );
        __raw_writel(gpio_reg_val, 0x48032134);

        // Clear any existing output data
        gpio_reg_val  = __raw_readl(0x48032190);        //0x4803 2190 (GPIO0 Clear Data Output)
        gpio_reg_val |= ( CVDD_POWER_MNGR0|CVDD_POWER_MNGR1|CVDD_POWER_MNGR2|CVDD_FORSE_POWER );
        __raw_writel(gpio_reg_val, 0x48032190);

        // Set value of GPIO pins
        gpio_reg_val = __raw_readl(0x4803213C);       //0x4803 213C (GPIO0 Data Output)
        gpio_reg_val |= (CVDD_POWER_MNGR0 | CVDD_POWER_MNGR2);
        __raw_writel(gpio_reg_val, 0x4803213C);


        // Program the GPIO to change the voltage
        gpio_reg_val = __raw_readl(0x48032194);        //0x4803 2194 (GPIO0 Set Data Output)
        gpio_reg_val |= (CVDD_POWER_MNGR0 | CVDD_POWER_MNGR2);
        __raw_writel(gpio_reg_val, 0x48032194);   

    .....
    }

    Maybe you have some other suggestions.

    Thanks.

  • Sorry guys,

    I have some questions concerning mapping GPIO.

    From table 4-13 I saw that GP0[15] has two mapping points:

    1. PINCNTL161 (pin AE18) mapping point described as GP0[15](M1)
    2. PINCNTL44 (pin H2) mapping point described as GP0[15](M0)


    Could you help me to understand how one register (for example 0x4803 213C (GPIO0 Data Output) ) can control two ICs pins.

    Could you explain what is M0 and M1, and how I can use it.

    Thanks.

  • Hi Alex,
     
    M0 and M1 mean that you can pinmux GP0[15] to either pin AE18 or pin H2. However, you should never try to connect to both pins at the same time.
     
    On your problem above, please check whether your pinmux values don't get overwritten by another portion of the code. The pinmux section is very often duplicated in u-boot and kernel, also there could be raw writes somewhere in the kernel.
  • For propper GPIO pinout control under U-boot you should use next sequence:

        // GPIO0 CLK Enable
        __raw_writel(0x2, CM_ALWON_GPIO_0_CLKCTRL);
        while(__raw_readl(CM_ALWON_GPIO_0_CLKCTRL) != 0x2);

        // MUX PIN FOR GPIO (please refer to tables 4-11 and 4-13, setup default bits into proper state)
        // Keep attention: One GPIO pin can be routed into several ICs pins. Setup proper pinmux.
        val = PAD161_CNTRL;
        PAD161_CNTRL = (volatile unsigned int)           ( BIT(18) | BIT(16) | BIT(7));    //GP0[15]    
        val = PAD163_CNTRL;
        PAD163_CNTRL = (volatile unsigned int)           ( BIT(18) | BIT(16) | BIT(7));    //GP0[17]
        val = PAD168_CNTRL;
        PAD168_CNTRL = (volatile unsigned int)           ( BIT(18) | BIT(16) | BIT(7));    //GP0[22]
        val = PAD009_CNTRL;
        PAD009_CNTRL = (volatile unsigned int)           ( BIT(19) | BIT(18) | BIT(16) | BIT(7));    //GP0[2]

        // Program the GPIO to change the voltage (1 - is logic HIGH, 0 - is logic LOW)
        gpio_reg_val = __raw_readl(0x48032194);        //0x4803 2194 (GPIO0 Set Data Output)
        gpio_reg_val |= (CVDD_POWER_MNGR0 | CVDD_POWER_MNGR2);
        __raw_writel(gpio_reg_val, 0x48032194);  


        // Enable Output on GPIO0 (1 - is input, 0 - is output, by default all pins are input)
        gpio_reg_val  = __raw_readl(0x48032134);        //0x4803 2134 (GPIO0 Output Enable)
        gpio_reg_val &= ~( CVDD_POWER_MNGR0|CVDD_POWER_MNGR1|CVDD_POWER_MNGR2|CVDD_FORSE_POWER );
        __raw_writel(gpio_reg_val, 0x48032134);

    Thanks.

    Regards,

    Alex.