960H hybrid usecase 1fps drop

kisung cho

Hi.

i have a issue abour 960H mode.

i use external video decoder, this decoder can input 960H and 720H image however camera only support 720H mode. decoder itself can scale up this.

first i tested 720H mode setted video decoder and 720H hybrid usecase. all channel has 30fps.

second i tested 960H mode setted video decoder and 960H hybrid usecase, but there always 1fps frame drop.

when i check VIP log , there was a 1 repeat fps. how can i check why VIP had a repeat .

3173.960_log.txt

i attached SYSTEM_DEBUG_RT log

5481.system_debug_rt.txt

Best Regards.

over 12 years ago

0 Badri Narayanan over 12 years ago

TI__Guru 59700 points

Have you made the change to HDVPSS driver (vps_config.h) change I mentioned previously

ti_tools/hdvpss/packages/ti/psp/vps/common/vps_config.h

Change to

#define VPS_CFG_M2M_VPDMA_PRIORITY_RD (VPSHAL_VPDMA_DATADESCPRIO_4)

You have to do

rm -rfv build
rm -rfv lib
make clean

followed by make dvr_rdk after this change and use the newly built fimrware.

2.Are you using 2G memory map ? If so pls try with the following chnages which increases number of buffers

#define NUM_BUFS_PER_CH_CAPTURE (14)

#define     NUM_BUFS_PER_CH_DEI_DEIQ             (6)
#define     NUM_BUFS_PER_CH_DEI_VIP_SC_PRIQ      (6)
#define     NUM_BUFS_PER_CH_DEI_VIP_SC_SECQ      (6)
#define     NUM_BUFS_PER_CH_DEI_DEI_SC_SECQ      (4)
#define     NUM_BUFS_PER_CH_DEI_DEI_SC_TERQ      (4)
#define     NUM_BUFS_PER_CH_DEC_SD               (6)
#define     NUM_BUFS_PER_CH_DEC_HD               (4)
#define     NUM_BUFS_PER_CH_SWMS_HD              (6)
#define     NUM_BUFS_PER_CH_SWMS_SD              (6)
#define     NUM_BUFS_PER_CH_ENC_PRI              (6)
#define     NUM_BUFS_PER_CH_ENC_SEC              (6)
#define     NUM_BUFS_PER_CH_ENC_TER              (6)
#define     NUM_BUFS_PER_CH_BITSOUT_SD           (6)
#define     NUM_BUFS_PER_CH_BITSOUT_HD           (4)
#define     NUM_BUFS_PER_CH_SCLR                 (4)
#define     NUM_BUFS_PER_CH_BITSOUT_SCD          (2)
#define     NUM_BUFS_PER_CH_NSF                  (4)

3. Pls share your application code where you set vencParams before invoking Venc_init. I am mainly looking if you are changing the following in your app:

h264Profile

encodingPreset

rcType

0 kisung cho over 12 years ago in reply to Badri Narayanan

Expert 1460 points

1. #define VPS_CFG_M2M_VPDMA_PRIORITY_RD (VPSHAL_VPDMA_DATADESCPRIO_4)

i already use this priority. first posted already applied that.

2. increases number of buffers
YES, i use 2G DDR.

i attached log, i think repeat some reduced. but anyway exist. is it helped increase buffer size +1 per NUM_BUFS_PER_CH_XX?(i tested this after post this article, it's not helped)

3. vencParams

i attached encoding parameter log.

#### FULL LOG ####

3513.960h_queue_log.txt

0 kisung cho over 12 years ago in reply to kisung cho

Expert 1460 points

Hi.

i'm tracing frame drop issue in the 960H mode.

i unmarked below code and traced that issue.

when i check the log , i saw VPDMA frame drop.

is it helped (VPS_CAPT_TSK_PRI_LIST_UPDATE or VPS_CAPT_LIST_SIZE_MAX , VPS_CAPT_FRAME_QUE_LEN_PER_CH_MAX )value change?

could you let me know how to prevent VPDMA Frame Drop or how to trace the cause of VPDMA Frame Drop.

<log>

[m3vpss ] 31215: CAPT_DRV: Frame Drop (VPDMA CH = 57) !!!
[m3vpss ] 31271: CAPT_DRV: Frame Drop (VPDMA CH = 56) !!!
[m3vpss ] 31311: CAPT_DRV: Frame Drop (VPDMA CH = 39) !!!
[m3vpss ] 31312: CAPT_DRV: Frame Drop (VPDMA CH = 40) !!!
[m3vpss ] 31312: CAPT_DRV: Frame Drop (VPDMA CH = 41) !!!
[m3vpss ] 31312: CAPT_DRV: Frame Drop (VPDMA CH = 54) !!!
[m3vpss ] 31312: CAPT_DRV: Frame Drop (VPDMA CH = 55) !!!
[m3vpss ] 31487: CAPT_DRV: Frame Drop (VPDMA CH = 57) !!!
[m3vpss ] 31544: CAPT_DRV: Frame Drop (VPDMA CH = 57) !!!

</log>

<code>

hdvpss/dvr_rdk_hdvpss/packages/ti/psp/vps/drivers/capture/src/vpsdrv_capturePriv.h
#define VPS_CAPTURE_RT_DEBUG
#define VPS_CAPT_DO_FRAME_TAGGING_FOR_FRAME_DROP_ISSUE

</code>
2772.framedrop.txt

0 Badri Narayanan over 12 years ago in reply to kisung cho

TI__Guru 59700 points

The capture frame drop is because capture driver does not have output buffers.

Capture driver does not have output buffers because DEI performance is not realtime. This is why I asked you if you have done the change to HDVPSS driver I mentioned.

If you still see performance issue even with the change it means DDR b/w is the bottleneck.

1. For this first check if you are seeing full performance with dvr_rdk_demo_mcfw_api. Make sure SwMs is showing 4x4

2. Make sure you disable any changes like VPS_CAPTURE_RT_DEBUG that you enabled for debug

3. Make sure the Venc_params _exactly_ matches the demo_spl_usecase configuration .There are changes in encoder configuration to reduce DDR b/w which may not be taking effect due to wrong application configuration. The params you have shared are dynamic params. I want the encoder create static params.

0 kisung cho over 12 years ago in reply to Badri Narayanan

Expert 1460 points

Hi.

i check and runned dvr_rdk_demo_mcfw_api with DEMO_HYBRIDDVR_16CH usecase. there also have the same issue.

as you know i modified a little bit for 960H support.

i think i did not set wrong app configuration. you can see encoder create static params create.

we are not change encoder create static params.

we are not use mjpeg and extra qcif encoding .

if i remove that support, is it helpful for DDR bottleneck?(i already not use that func by setting Venc_disableChn ).

i attached my usecase file.

demo_spl_usecases.c

Fullscreen 3583.demo_spl_usecases.c Download

/**
  \file demo_spl_usecases.c
  \brief
  */
#include <sys/time.h>
#include <demo_spl_usecases.h>
#include <demo_vcap_venc_vdec_vdis_bits_rdwr.h>
#include <demo_scd_bits_wr.h>

/* used to set resolution / buf size of ipcbits for varying resolutions based on usecase */
static VcapVencVdecVdis_res    ipcbits_res[MCFW_IPCBITS_RESOLUTION_TYPES];

static Int64 get_current_time_to_msec(void)
{
    struct timeval tv;
    gettimeofday(&tv, NULL);

    return ((Int64)tv.tv_sec*1000 + tv.tv_usec/1000);
}

static
Void VcapVencVdecVdisSplUsecase_setDemoInfo(int demoId)
{
    switch (demoId)
    {
        case    DEMO_HYBRIDDVR_16CH:
            ipcbits_res[0].width = MCFW_IPCBITS_D1_WIDTH;
            ipcbits_res[0].height = MCFW_IPCBITS_D1_HEIGHT;
#if 0
	// kisung cho start
            ipcbits_res[1].width = MCFW_IPCBITS_HD_WIDTH;
            ipcbits_res[1].height = MCFW_IPCBITS_HD_HEIGHT;
	// end
#endif
            gDemo_info.maxVcapChannels = 16;
            gDemo_info.maxVencChannels = (16+16+16);
#if 0
            gDemo_info.maxVdecChannels = 16+4;
#else
	// kiusng cho start, not using 4 extra HD channel
            gDemo_info.maxVdecChannels = 16;
	// end
#endif
            gDemo_info.maxVdisChannels =
                (gDemo_info.maxVcapChannels + gDemo_info.maxVdecChannels);
            gDemo_info.VsysNumChs  = 16;
#if 0
            gDemo_info.usecase = VSYS_USECASE_MULTICHN_HYBRID_DVR_16CH;
#else
	// kisung cho
            gDemo_info.usecase = VSYS_USECASE_MULTICHN_HYBRID_DVR_16CH_960;
	// end
#endif
            gDemo_info.Type    = DEMO_TYPE_PROGRESSIVE;
            gDemo_info.osdEnable   = TRUE;
            gDemo_info.scdTileConfigInitFlag = FALSE;
            gDemo_info.numEncChannels[0] = 16;
            gDemo_info.numEncChannels[1] = 16;
            gDemo_info.numEncChannels[2] = 16;
            gDemo_info.numEncChannels[3] = 16;
            gDemo_info.bitRateKbps[0]    = 2000;
            gDemo_info.bitRateKbps[1]    = 500;
            gDemo_info.bitRateKbps[2]    = 100;
            gDemo_info.bitRateKbps[3]    = 125;
            gDemo_info.numDeis = 2;
            gDemo_info.numSwMs = 2;
            gDemo_info.numDisplays = 2;
            gDemo_info.defaultLayoutId[VDIS_DEV_HDMI] = DEMO_LAYOUT_MODE_16CH;
#if 1
            gDemo_info.defaultLayoutId[VDIS_DEV_SD] = DEMO_LAYOUT_MODE_4CH;
#else
		// kisung cho
            gDemo_info.defaultLayoutId[VDIS_DEV_SD] = DEMO_LAYOUT_MODE_16CH;
		// end
#endif
            gDemo_info.defaultLayoutStartCh[VDIS_DEV_HDMI] = 0;
#if 0
            gDemo_info.defaultLayoutStartCh[VDIS_DEV_SD] = 16;
#else
		// kisung cho
            gDemo_info.defaultLayoutStartCh[VDIS_DEV_SD] = 0;
		// end
#endif
            gDemo_info.scdEnable = TRUE;
            gDemo_info.numTiedVencs = 2;
            gDemo_info.tiedVencIds[0] = VDIS_DEV_HDMI;
            gDemo_info.tiedVencIds[1] = VDIS_DEV_HDCOMP;
            break;

        case    DEMO_CARDVR_4CH:
            ipcbits_res[0].width = MCFW_IPCBITS_D1_WIDTH;
            ipcbits_res[0].height = MCFW_IPCBITS_D1_HEIGHT;
            ipcbits_res[1].width = MCFW_IPCBITS_D1_WIDTH;
            ipcbits_res[1].height = MCFW_IPCBITS_D1_HEIGHT;
            gDemo_info.maxVcapChannels = 8;
            gDemo_info.maxVdisChannels = 8;
            gDemo_info.maxVencChannels = 5;
            gDemo_info.maxVdecChannels = 1;
            gDemo_info.VsysNumChs  = 8;
            gDemo_info.usecase = VSYS_USECASE_MULTICHN_CAR_DVR_4CH;
            gDemo_info.Type    = DEMO_TYPE_PROGRESSIVE;
            gDemo_info.osdEnable   = TRUE;
            gDemo_info.scdTileConfigInitFlag = FALSE;
            gDemo_info.numEncChannels[0] = 1;
            gDemo_info.numEncChannels[1] = gDemo_info.maxVencChannels - gDemo_info.numEncChannels[0];
            gDemo_info.numEncChannels[2] = 0;
            gDemo_info.numEncChannels[3] = 0;
            gDemo_info.bitRateKbps[0]    = 2000;
            gDemo_info.bitRateKbps[1]    = 2000;
            gDemo_info.numDeis = 2;
            gDemo_info.numSwMs = 1;
            gDemo_info.numDisplays = 1;
            gDemo_info.defaultLayoutId[VDIS_DEV_HDMI] = DEMO_LAYOUT_MODE_16CH;
            gDemo_info.defaultLayoutId[VDIS_DEV_SD] = DEMO_LAYOUT_MODE_4CH;
            gDemo_info.scdEnable = FALSE;
            gDemo_info.numTiedVencs = 2;
            gDemo_info.tiedVencIds[0] = VDIS_DEV_HDCOMP;
            gDemo_info.tiedVencIds[1] = VDIS_DEV_DVO2;
            gDemo_info.defaultLayoutStartCh[VDIS_DEV_SD] = 0;

            break;

        case    DEMO_HYBRIDENC_36CH:
            ipcbits_res[0].width = MCFW_IPCBITS_D1_WIDTH;
            ipcbits_res[0].height = MCFW_IPCBITS_D1_HEIGHT;
            ipcbits_res[1].width = MCFW_IPCBITS_HD_WIDTH;
            ipcbits_res[1].height = MCFW_IPCBITS_HD_HEIGHT;
            gDemo_info.maxVcapChannels = 9;
            gDemo_info.maxVencChannels = (9+9+9+9);
            gDemo_info.maxVdecChannels = 1;
            gDemo_info.maxVdisChannels =
                (gDemo_info.maxVcapChannels + gDemo_info.maxVdecChannels);
            gDemo_info.VsysNumChs  = 9;
            gDemo_info.usecase = VSYS_USECASE_MULTICHN_HYBRID_ENC_36CH;
            gDemo_info.Type    = DEMO_TYPE_PROGRESSIVE;
            gDemo_info.osdEnable   = FALSE;
            gDemo_info.scdTileConfigInitFlag = FALSE;
            gDemo_info.numEncChannels[0] = 1;
            gDemo_info.numEncChannels[1] = 17;
            gDemo_info.numEncChannels[2] = 18;
            gDemo_info.numEncChannels[3] = 0;
            gDemo_info.bitRateKbps[0]    = 2000;
            gDemo_info.bitRateKbps[1]    = 1000;
            gDemo_info.numDeis = 2;
            gDemo_info.numSwMs = 1;
            gDemo_info.numDisplays = 1;
            gDemo_info.defaultLayoutId[VDIS_DEV_HDMI] = DEMO_LAYOUT_MODE_16CH;
            gDemo_info.scdEnable = TRUE;
            gDemo_info.numTiedVencs = 2;
            gDemo_info.tiedVencIds[0] = VDIS_DEV_HDMI;
            gDemo_info.tiedVencIds[1] = VDIS_DEV_HDCOMP;
            gDemo_info.defaultLayoutStartCh[VDIS_DEV_HDMI] = 0;
            break;

        default:
            break;
    }
}

static
Void VcapVencVdecVdisSplUsecase_setVcapParams(Demo_Info *demoInfo,
                                              VCAP_PARAMS_S *vcapParams)
{
    Vcap_params_init(vcapParams);
    vcapParams->numChn = demoInfo->maxVcapChannels;
// kisung cho start
        vcapParams->enableConfigExtVideoDecoder = FALSE;
// end

}

static
Void VcapVencVdecVdisSplUsecase_setVencParams(Demo_Info *demoInfo,
                                              VENC_PARAMS_S *vencParams)
{
    Venc_params_init(vencParams);
    vencParams->numPrimaryChn = demoInfo->numEncChannels[0];
    vencParams->numSecondaryChn = demoInfo->numEncChannels[1];
    vencParams->numTertiaryChn = demoInfo->numEncChannels[3];
    /*Enabling generation of motion vector for channel 0 only,
         * for other channels please add to the below line*/
#if 0
    vencParams->encChannelParams[0].enableAnalyticinfo = 1;
    //vencParams.encChannelParams[1].enableAnalyticinfo = 1;
#else
	// kisung cho start
    vencParams->encChannelParams[0].enableAnalyticinfo = 0;
	// end
#endif
    vencParams->encChannelParams[0].maxBitRate = -1;
}

static
Void VcapVencVdecVdisSplUsecase_setVsysParams(Demo_Info *demoInfo,
                                              VSYS_PARAMS_S *vsysParams)
{
    Vsys_params_init(vsysParams);
    vsysParams->numChs  = demoInfo->VsysNumChs;
    vsysParams->systemUseCase = demoInfo->usecase;
    vsysParams->enableOsd     = demoInfo->osdEnable;
    vsysParams->numDeis       = demoInfo->numDeis;
    vsysParams->numSwMs       = demoInfo->numSwMs;
    vsysParams->numDisplays   = demoInfo->numDisplays;
    if (demoInfo->numEncChannels[1])
    {
        vsysParams->enableSecondaryOut = TRUE;
    }
    else
    {
        vsysParams->enableSecondaryOut = FALSE;
    }
    vsysParams->enableCapture = TRUE;
    vsysParams->enableScd     = demoInfo->scdEnable;
    vsysParams->enableNsf     = FALSE;
    if (demoInfo->numEncChannels[2])
    {
        vsysParams->enableMjpegEnc = TRUE;
    }
    else
    {
        vsysParams->enableMjpegEnc = FALSE;
    }
    vsysParams->enableNullSrc = FALSE;
    vsysParams->enableAVsync  = TRUE;
}

static
Void VcapVencVdecVdisSplUsecase_setVdecParams(Demo_Info *demoInfo,
                                              VDEC_PARAMS_S *vdecParams)
{
    Vdec_params_init(vdecParams);

    vdecParams->numChn = demoInfo->maxVdecChannels;
}

static
Void VcapVencVdecVdisSplUsecase_setVdisParams(Demo_Info *demoInfo,
                                              VDIS_PARAMS_S *vdisParams)
{
    Bool forceLowCostScale = FALSE;

    Vdis_params_init(vdisParams);
// kisung cho start
     vdisParams->enableConfigExtVideoEncoder = FALSE;
     vdisParams->enableConfigExtThsFilter = FALSE;

// end


    vdisParams->numChannels = demoInfo->maxVdisChannels;
    /* Override the context here as needed */
    vdisParams->deviceParams[VDIS_DEV_HDMI].resolution   = DEMO_HD_DISPLAY_DEFAULT_STD;
    vdisParams->deviceParams[VDIS_DEV_HDCOMP].resolution = DEMO_HD_DISPLAY_DEFAULT_STD;
    if (demoInfo->numTiedVencs > 1)
    {
        OSA_assert(demoInfo->numTiedVencs == 2);
        Vdis_tiedVencInit(demoInfo->tiedVencIds[0], demoInfo->tiedVencIds[1], vdisParams);
    }

#if 0
    vdisParams->deviceParams[VDIS_DEV_SD].resolution     = VSYS_STD_PAL;
#else
// kisung cho start
    vdisParams->deviceParams[VDIS_DEV_SD].resolution     = VSYS_STD_NTSC;
// end
#endif
    vdisParams->enableLayoutGridDraw = FALSE;

    forceLowCostScale = TRUE;

    /* set for 3 displays */

    Demo_swMsGenerateLayout(VDIS_DEV_HDMI, demoInfo->defaultLayoutStartCh[VDIS_DEV_HDMI], demoInfo->maxVdisChannels,
                          demoInfo->defaultLayoutId[VDIS_DEV_HDMI],
                          &vdisParams->mosaicParams[VDIS_DEV_HDMI], forceLowCostScale,
                          demoInfo->Type,
                          vdisParams->deviceParams[VDIS_DEV_HDMI].resolution);
    vdisParams->mosaicParams[VDIS_DEV_HDMI].userSetDefaultSWMLayout = TRUE;


    Demo_swMsGenerateLayout(VDIS_DEV_SD, demoInfo->defaultLayoutStartCh[VDIS_DEV_SD], demoInfo->maxVdisChannels,
                          demoInfo->defaultLayoutId[VDIS_DEV_SD],
                          &vdisParams->mosaicParams[VDIS_DEV_SD], FALSE,
                          demoInfo->Type,
                          vdisParams->deviceParams[VDIS_DEV_SD].resolution);
    vdisParams->mosaicParams[VDIS_DEV_SD].userSetDefaultSWMLayout = TRUE;

}

static
Void VcapVencVdecVdisSplUsecase_setOsdConfig(VCAP_PARAMS_S *vcapParams)
{
    UInt16 osdFormat[ALG_LINK_OSD_MAX_CH];
    UInt32 chId;

    /* Most of progressive use cases have OSD in YUV420 SP format */
    for(chId = 0; chId < ALG_LINK_OSD_MAX_CH; chId++)
         osdFormat[chId] = SYSTEM_DF_YUV420SP_UV;

    /* Create and initialize OSD window buffers */
    Demo_osdInit(vcapParams->numChn, osdFormat);

    for(chId = 0; chId < vcapParams->numChn; chId++)
    {
        vcapParams->channelParams[chId].dynamicParams.osdChWinPrm = &g_osdChParam[chId];
        /* Initialize osdLink with created and set win params */
        Vcap_setDynamicParamChn(chId, &vcapParams->channelParams[chId].dynamicParams, VCAP_OSDWINPRM);
    }
}

static
Void VcapVencVdecVdisSplUsecase_setVencDynamicParams(Demo_Info *demoInfo,
                                                     VENC_PARAMS_S *vencParams)
{
    UInt32 chId;
    VENC_CHN_DYNAMIC_PARAM_S params = { 0 };
    VSYS_VIDEO_STANDARD_E vidStandard;

    vidStandard = Demo_captureGetSignalStandard();
    /* Setting FPS for the Encoder Channels */
    for(chId=0; chId<demoInfo->numEncChannels[0]; chId++)
    {
        if(vidStandard == VSYS_STD_PAL)
        {
            memset(&params, 0, sizeof(params));

            Venc_setInputFrameRate(chId, 25);

            params.frameRate = 25;
            params.targetBitRate = demoInfo->bitRateKbps[0] * 1000;
            Venc_setDynamicParam(chId, 0, &params, VENC_FRAMERATE);
        }
        else if(vidStandard == VSYS_STD_NTSC)
        {
            memset(&params, 0, sizeof(params));
            Venc_setInputFrameRate(chId, 30);

            params.frameRate = 30;
            params.targetBitRate = demoInfo->bitRateKbps[0] * 1000;
            Venc_setDynamicParam(chId, 0, &params, VENC_FRAMERATE);

        }
        else
        {
           printf (" DEMO: No video detected at CH [%d] !!!\n",
                     chId);
        }
    }
    for(chId = demoInfo->numEncChannels[0];
        chId < (demoInfo->numEncChannels[0] + demoInfo->numEncChannels[1]);
        chId++)
    {
        if(vidStandard == VSYS_STD_PAL)
        {
            memset(&params, 0, sizeof(params));

            Venc_setInputFrameRate(chId, 25);

            params.frameRate = 25;
            params.targetBitRate = demoInfo->bitRateKbps[1] * 1000;
            Venc_setDynamicParam(chId, 0, &params, VENC_FRAMERATE);
        }
        else if(vidStandard == VSYS_STD_NTSC)
        {
            memset(&params, 0, sizeof(params));

            Venc_setInputFrameRate(chId, 30);
            params.frameRate = 30;

            params.targetBitRate = demoInfo->bitRateKbps[1] * 1000;

            Venc_setDynamicParam(chId, 0, &params, VENC_FRAMERATE);
        }
    }
    for(chId = (demoInfo->numEncChannels[0] + demoInfo->numEncChannels[1]);
        chId < (demoInfo->numEncChannels[0] + demoInfo->numEncChannels[1] + demoInfo->numEncChannels[2]);
        chId++)
    {
        if(vidStandard == VSYS_STD_PAL)
        {
            memset(&params, 0, sizeof(params));

            Venc_setInputFrameRate(chId, 25);

            params.frameRate = 25;
            params.targetBitRate = demoInfo->bitRateKbps[2] * 1000;
            Venc_setDynamicParam(chId, 0, &params, VENC_FRAMERATE);
        }
        else if(vidStandard == VSYS_STD_NTSC)
        {
            memset(&params, 0, sizeof(params));

            Venc_setInputFrameRate(chId, 30);
            params.frameRate = 30;

            params.targetBitRate = demoInfo->bitRateKbps[2] * 1000;

            Venc_setDynamicParam(chId, 0, &params, VENC_FRAMERATE);
        }
    }

    for(chId = (demoInfo->numEncChannels[0] + demoInfo->numEncChannels[1] + demoInfo->numEncChannels[2]);
        chId < (demoInfo->numEncChannels[0] + demoInfo->numEncChannels[1] + demoInfo->numEncChannels[2] + demoInfo->numEncChannels[3]);
        chId++)
    {
        if(vidStandard == VSYS_STD_PAL)
        {
            memset(&params, 0, sizeof(params));

            Venc_setInputFrameRate(chId, 25);

            params.frameRate = 25;
            params.targetBitRate = demoInfo->bitRateKbps[3] * 1000;
            Venc_setDynamicParam(chId, 0, &params, VENC_FRAMERATE);
        }
        else if(vidStandard == VSYS_STD_NTSC)
        {
            memset(&params, 0, sizeof(params));

            Venc_setInputFrameRate(chId, 30);
            params.frameRate = 30;

            params.targetBitRate = demoInfo->bitRateKbps[3] * 1000;

            Venc_setDynamicParam(chId, 0, &params, VENC_FRAMERATE);
        }
    }
}


Void VcapVencVdecVdisSplUsecase_start(int demoId)
{
    VSYS_PARAMS_S vsysParams;
    VCAP_PARAMS_S vcapParams;
    VENC_PARAMS_S vencParams;
    VDEC_PARAMS_S vdecParams;
    VDIS_PARAMS_S vdisParams;
    Bool enableFWrite = FALSE;
    Bool enableLayerWrite = FALSE;
    UInt64 wallTimeBase;
    UInt32 resolutionClass;

    VcapVencVdecVdisSplUsecase_setDemoInfo(demoId);
    VcapVencVdecVdisSplUsecase_setVcapParams(&gDemo_info,&vcapParams);
    VcapVencVdecVdisSplUsecase_setVencParams(&gDemo_info,&vencParams);
    VcapVencVdecVdisSplUsecase_setVsysParams(&gDemo_info,&vsysParams);
    VcapVencVdecVdisSplUsecase_setVdecParams(&gDemo_info,&vdecParams);
    VcapVencVdecVdisSplUsecase_setVdisParams(&gDemo_info,&vdisParams);



    printf ("--------------- CHANNEL DETAILS-------------\n");
    printf ("Capture Channels => %d\n", vcapParams.numChn);
    printf ("Enc Channels => Primary %d, Secondary %d\n", vencParams.numPrimaryChn, vencParams.numSecondaryChn);
    printf ("Dec Channels => %d\n", vdecParams.numChn);
    printf ("Disp Channels => %d\n", vdisParams.numChannels);
    printf ("-------------------------------------------\n");

    wallTimeBase = get_current_time_to_msec();
    wallTimeBase = 0;
    Vdis_setWallTimeBase(wallTimeBase);

    /* Override the context here as needed */
    Vsys_init(&vsysParams);

    /* Override the context here as needed */
#if 0 
    Vcap_init(&vcapParams);
#else
	// kisung cho start, NTSC mode force setting
    Vcap_init_Tibet(&vcapParams, FALSE);
	// end
#endif

    /* Override the context here as needed */
    Venc_init(&vencParams);


    /* Override the context here as needed */
    Vdec_init(&vdecParams);


    Vdis_init(&vdisParams);

    resolutionClass = DEMO_SCD_RESOLUTION_CLASS_CIF;

    if(vsysParams.enableScd == TRUE)
    {
        //Scd_bitsWriteCreate(demoId, resolutionClass);
    }

    enableFWrite = Demo_getFileWriteEnable();

    /* Init the application specific module which will handle bitstream exchange */
    VcapVencVdecVdis_ipcBitsInit(ipcbits_res, enableFWrite,enableLayerWrite);

    Vsys_configureDisplay();

#if USE_FBDEV
    grpx_fb_init(GRPX_FORMAT_RGB565);
#endif

    /* Create Link instances and connects compoent blocks */
    Vsys_create();

    if (vsysParams.enableOsd)
    {
        VcapVencVdecVdisSplUsecase_setOsdConfig(&vcapParams);
    }


    /* Start components in reverse order */
    Vdis_start();
    Vdec_start();
    Venc_start();
    Vcap_start();

#if USE_FBDEV
     //grpx_fb_draw(VDIS_DEV_HDMI);
#ifdef TI_816X_BUILD
     //grpx_fb_draw(VDIS_DEV_DVO2);
#endif
#endif

    VcapVencVdecVdisSplUsecase_setVencDynamicParams(&gDemo_info,&vencParams);

}

Void VcapVencVdecVdisSplUsecase_stop()
{
    VSYS_PARAMS_S contextInf;
    Vsys_getContext(&contextInf);

//    if(contextInf.enableScd)
//        Scd_bitsWriteStop();

    VcapVencVdecVdis_ipcBitsStop();
    /* Stop components */
    Vcap_stop();
    Venc_stop();
    Vdec_stop();
    Vdis_stop();

#if USE_FBDEV
     grpx_fb_exit();
#endif

     /* Free the osd buffers */
    Demo_osdDeinit();

    Vsys_delete();

    Vsys_deConfigureDisplay();

    if(contextInf.enableScd)
        //Scd_bitsWriteDelete();


    VcapVencVdecVdis_ipcBitsExit();

    /* De-initialize components */
    Vcap_exit();
    Venc_exit();
    Vdec_exit();
    Vdis_exit();

    Vsys_exit();

}

multich_hybrid_dvr.c

2235.multich_hybrid_dvr.c

*** below is my U-Boot log , when i see DDR autoconf is ok ****

U-Boot 2010.06 (Jan 30 2013 - 15:34:41)

TI8168-GP rev 2.0

HDVICP clk     : 600MHz
L3 Fast clk    : 549MHz
HDVPSS clk     : 274MHz
Ducati M3 clk : 274MHz
DSP clk        : 1000MHz
ARM clk        : 1200MHz
DDR clk        : 796MHz

------------ PLL Settings --------------
MAIN_N        : 56, MAIN_P: 1, OSC_FREQ: 27, FAPLL_K: 8

MAIN_INTFREQ1 : 0xC, MAIN_FRACFREQ1: 0x189374, MAIN_MDIV1: 0x1
MAIN_INTFREQ2 : 0xA, MAIN_FRACFREQ2: 0x147AE1, MAIN_MDIV2: 0x1
MAIN_INTFREQ3 : 0xA, MAIN_FRACFREQ3: 0x147AE1, MAIN_MDIV3: 0x2
MAIN_INTFREQ4 : 0xB, MAIN_FRACFREQ4: 0x0, MAIN_MDIV4: 0x2
MAIN_INTFREQ5 : 0xC, MAIN_FRACFREQ5: 0x189374, MAIN_MDIV5: 0x8

MAIN_MDIV6    : 0x3F
MAIN_MDIV7    : 0x4

--------- DDR PLL ----------
DDR_N                  : 0x3B
DDR_P                  : 0x1
DDR_MDIV1              : 0x2
DDR_INTFREQ2           : 0x8
DDDDR_FRACFREQ2R_N     : 0xD99999
DDR_MDIV2              : 0x1E
DDR_INTFREQ3           : 0x8
DDR_FRACFREQ3          : 0x0
DDR_MDIV3              : 0x4
DDR_INTFREQ4           : 0xE
DDR_FRACFREQ4          : 0x0
DDR_MDIV4              : 0x4
DDR_INTFREQ5           : 0xE
DDR_FRACFREQ5          : 0x0
DDR_MDIV5              : 0x4

----------EMIF Timings (identical for 0 & 1)-------
EMIF_TIM1   : 0x1779C9FE
EMIF_TIM2   : 0x50608074
EMIF_TIM3   : 0x009F857F
EMIF_SDREF : 0x10001841
EMIF_SDCFG : 0x62A73832
EMIF_PHYCFG : 0x00000110

----------SW LEVEL Info (EMIF 0) -------
RD_DQS_GATE_BYTE_LANE0: 0x00000160
RD_DQS_GATE_BYTE_LANE1: 0x00000178
RD_DQS_GATE_BYTE_LANE2: 0x000001B3
RD_DQS_GATE_BYTE_LANE3: 0x000001D6

WR_DQS_RATIO_BYTE_LANE0: 0x0000007D
WR_DQS_RATIO_BYTE_LANE1: 0x0000008F
WR_DQS_RATIO_BYTE_LANE2: 0x000000A2
WR_DQS_RATIO_BYTE_LANE3: 0x000000B2

RD_DQS_RATIO_BYTE_LANE0: 0x00000037
RD_DQS_RATIO_BYTE_LANE1: 0x00000037
RD_DQS_RATIO_BYTE_LANE2: 0x00000038
RD_DQS_RATIO_BYTE_LANE3: 0x0000003B

WR_DATA_RATIO_BYTE_LANE0: 0x000000BD
WR_DATA_RATIO_BYTE_LANE1: 0x000000CF
WR_DATA_RATIO_BYTE_LANE2: 0x000000E2
WR_DATA_RATIO_BYTE_LANE3: 0x000000F2

----------SW LEVEL Info (EMIF 1) -------
RD_DQS_GATE_BYTE_LANE0: 0x0000015F
RD_DQS_GATE_BYTE_LANE1: 0x00000171
RD_DQS_GATE_BYTE_LANE2: 0x000001B5
RD_DQS_GATE_BYTE_LANE3: 0x000001D3

WR_DQS_RATIO_BYTE_LANE0: 0x0000006F
WR_DQS_RATIO_BYTE_LANE1: 0x00000087
WR_DQS_RATIO_BYTE_LANE2: 0x000000A5
WR_DQS_RATIO_BYTE_LANE3: 0x000000B0

RD_DQS_RATIO_BYTE_LANE0: 0x00000035
RD_DQS_RATIO_BYTE_LANE1: 0x00000043
RD_DQS_RATIO_BYTE_LANE2: 0x0000003F
RD_DQS_RATIO_BYTE_LANE3: 0x00000038

WR_DATA_RATIO_BYTE_LANE0: 0x000000AF
WR_DATA_RATIO_BYTE_LANE1: 0x000000C7
WR_DATA_RATIO_BYTE_LANE2: 0x000000E5
WR_DATA_RATIO_BYTE_LANE3: 0x000000F0

Best Regards.

0 kisung cho over 12 years ago in reply to kisung cho

Expert 1460 points

In addition.

i think that if i remove QCIF 16CH and MJPEG 16CH in the multich_hybrid_dvr.c , it may be solution of this issue.

what do you think about that? if it is true can you see my multich_hybrid_dvr.c to disable that func. where to unmak and change multich_hybrid_dvr.c?

Best Regards.

0 Badri Narayanan over 12 years ago in reply to kisung cho

TI__Guru 59700 points

I dont think disabling will help. Anyhow you can try.To disable MJPEG and QCIF do the following:

/dvr_rdk/mcfw/src_linux/mcfw_api/usecases/multich_hybrid_dvr.c

multich_hybriddvr_set_links_framerate()

/* Stream 3 -DEI_SC_OUT_SECONDARY is inputfps/2 */
        params.streamId = DEI_LINK_OUT_QUE_DEI_SC_SECONDARY_OUT;
        if (isPAL && fieldRateUpscale)
        {
            /* Input is 30 even for PAL because we do field repeat at DEI input */
            params.inputFrameRate = 15 * 10;
        }
        else
        {
            params.inputFrameRate = (MULTICH_HYBRIDDVR_GET_CAPTURE_FRAMES_PER_SEC() * 10)/2;
        }
        params.outputFrameRate = 0 * 10;
        status = System_linkControl(gVcapModuleContext.deiId[0], DEI_LINK_CMD_SET_FRAME_RATE,
                                    &params, sizeof(params), TRUE);
        status = System_linkControl(gVcapModuleContext.deiId[1], DEI_LINK_CMD_SET_FRAME_RATE,
                                    &params, sizeof(params), TRUE);

        /* Stream 4 -DEI_SC_OUT_TERTIARY is 15 */
        params.streamId = DEI_LINK_OUT_QUE_DEI_SC_TERTIARY_OUT;
        if (isPAL && fieldRateUpscale)
        {
            /* Input is 30 even for PAL because we do field repeat at DEI input */
            params.inputFrameRate = 15;
            params.outputFrameRate = 0;
        }
        else
        {
            params.inputFrameRate = (MULTICH_HYBRIDDVR_GET_CAPTURE_FRAMES_PER_SEC() * 10)/2;
            params.outputFrameRate = 0;
        }

0 kisung cho over 12 years ago in reply to Badri Narayanan

Expert 1460 points

Hi Badri.

disabling MJPEG and QCIF helped up to the DEI performance in 960H mode.

anyway, i don't use that func. someday if i have to use MJPEG, i will get raw data and encode it .

but i don't understand why DEI performance is upped .

what do you think about that?

if there is another solution. pls inform me.

Thank you for your support. your support helped so much.

Best Regards. CHO

0 Badri Narayanan over 12 years ago in reply to kisung cho

TI__Guru 59700 points

Can you pls share the logs with MJPEG and QCIF disabled.Disabling MJPEG and QCIF will reduce the DEI driver CPU consumption. Want to compare with your previous logs.

0 kisung cho over 12 years ago in reply to Badri Narayanan

Expert 1460 points

Hi.

it's my log 960H.

6116.960h_dei.txt

Best Regards.

0 Badri Narayanan over 12 years ago in reply to kisung cho

TI__Guru 59700 points

The DEI thread CPU cycles is doubling between the QCIF enabled and QCIF disabled case

QCIF/MJPEG disabled

[m3vpss ] 226438: LOAD: TSK: DEI0 : 5.5%
[m3vpss ] 226438: LOAD: TSK: DEI2 : 5.4%

QCIF/MJPEG enabled

[m3vpss ] 125239: LOAD: TSK: DEI0 : 10.2%
[m3vpss ] 125239: LOAD: TSK: DEI2 : 10.0%

The additional CPU load is because driver has to program the output width and hieght for QCIF channels. Although CPU load is not an issue increase in CPU load will reduce DEI IP utilization which I guess is the reason for the drop you are seeing.

I guess enabling MJPEG wll not cause any performance drop. You can just keep QCIF channels disabled as you dont use them.

Processors

Processors forum

960H hybrid usecase 1fps drop