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My RTSC based program runs in "debug" but not in "release"

Hello,

I am using the TI RTSC libraries for my C6678 program.  If I run my application in debug, the libraries and my project works fine.  If I run my project in debug with -O2 option, my program works fine.  If I change the RTSC build profile to "release" my application gets stuck.  I also cannot figure exactly where it gets stuck because it is in release mode. 

I suspect that this has to do with the Advisory 6 errata because my program looks like it stalls while waiting for a flag.  In my code, I use the workaround, but maybe it is not used in some of the libraries? 

If I add a System_printf to try to figure whats going on - the problem goes away.  I cannot add additional time though - I need to go as fast as possible (obviously.)

Do you have some suggestions about what might cause this difference and things for me to test/check?  I think it might be in TI portion since my application works if I just add the -O2 option.

Thanks in advance,

Brandy

  • Advisory 6 is a SRIO Advisory.  Is the 'Flag' you're expecting a message received via SRIO?

    That said, the libraries would have already been pre-built.  Unless you are rebuilding the libraries w/ different options, you would be using the same build version from the libraries themselves when using both the Release and Debug profiles.  Also, the libraries should have included any workaround for known bugs.

    Best Regards,

    Chad

  • Hi Chad,

    I was referring to this "Advisory 6— Potential L2 Cache Corruption During Block Coherence Operations Issue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16".

    But what you are saying is that regardless of whether I switch build profile to release or debug it should not matter.  See screen shot for the item I am talking about.

    However, it does. If I run this in debug, clean build my project first, it works.  If I run this profile in release, it does not run.  It gets stuck.

    Here is a post with a bit more about my problem with Advisory 6, http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/253690/894765.aspx#894765.

    It seems like Core 0 is waiting for Core 1 to 7 to finish their task.  However, I suspect they are never starting the task for some reason.  I am trying to figure more about it.

    Thanks,

    brandy

  • Sorry for the confusion here, John's comments and the associate link was referencing the C6670 Errata.  You're referencing C6678.  The C6678 Errata has the same Advisory but it's #7 here's a link to the C6678 Errata for future reference http://www.ti.com/lit/er/sprz334e/sprz334e.pdf 

    The MFENCE workaround has been applied to all the Libraries which utilize the Block Coherence operations.  Note that the CSL's block coherence operations would not include this workaround, the workaround would be applied to the code using the CSL block coherence calls.

    That said, I'm not sure I see a relationship between your code stalling waiting for a flag and the potential corruption of L2 Cache?

    Can you give more details on what this 'flag' is that you referenced as not having received and thus the code has stalled?

    Best Regards,

    Chad

  • Hi Chad,

    The problem was cache related.  I had to add the prefetch invalidate whenever I also did a wb.  It seems that this wasn't a problem when I had enough prints or debugs, but once it was running in release mode, the buffer was fetching junk.

    Thanks,

    Brandy

  • It sounds like the printf's were effectively flushing the cache, so it was re-fetching, but in the release it was still sitting resident in cache (even though WB was performed) and any modifications that required manual coherence operations wasn't getting done.

    Glad you got this resolved.

    Best Regards,

    Chad