AM335x - Changing VDD_MPU

RNJ

I'm using the AM3352ZCZD60 with a TPS65910AA1. The common configuration of my PMIC is VDD_CORE and VDD_MPU in 1.1V - In case, OPP100, OPP100.

This configuration makes my MPU to run with 500MHz ( Table 3-3, page 82, Literature Number SPRS717F).

I want to change the frequency to 600MHz (Maximum perfomance). I'm not sure which order of the steps should I take to perform this change.

Can I change my VDD_MPU in PMIC anytime with the processor powered? Is there any trouble with that?

When booting, In SPL code there is a reg MPU_PLL_CONFIG to changing the OPP100 to OPP120. I'm using a co-processor to start-up the PMIC and control it by I2C. Is there any trouble to changing the SPL code to OPP120 without the Co-processor finish the command by I2C?

Which steps should I do first? Is there any document to help with this process?

over 12 years ago

0 Biser Gatchev-XID over 12 years ago

TI__Guru**** 393215 points

Hi Ricardo,

Check this wiki page: http://processors.wiki.ti.com/index.php/AM335x_Power_Management_User_guide

0 RNJ over 12 years ago in reply to Biser Gatchev-XID

Prodigy 87 points

Hello Biser,

Thanks for your report. But I'm still not seeing the answer for the following question, could you reply please?

"When booting, In SPL code there is a reg MPU_PLL_CONFIG to changing the OPP100 to OPP120. I'm using a co-processor to start-up the PMIC and control it by I2C. Is there any trouble to changing the SPL code to OPP120 without the Co-processor finish the command by I2C?"

0 Biser Gatchev-XID over 12 years ago in reply to RNJ

TI__Guru**** 393215 points

Hi Ricardo,

I don't quite understand. Do you mean that the PMIC is controlled by a different processor, not the AM335X?

0 RNJ over 12 years ago in reply to Biser Gatchev-XID

Prodigy 87 points

Hello Biser,

Right. The PMIC is being controlled by a MCU (cortex M3). So the question is when is the correct time to change the VDD_MPU. Since both controllers (Sitara + Co-processor) will start almost at the same time (1st MCU -> 2nd Sitara).

Anyways, if I change in SPL configuration to run at OPP120 and my Co-processor didn't finish yet the message in I2C, sending the information to my PMIC, is there any trouble in this delay?

Thanks a lot!!

0 Biser Gatchev-XID over 12 years ago in reply to RNJ

TI__Guru**** 393215 points

I have never heard of such a design. The PMIC should be controlled by the AM335X - Linux SDK has all the necessary software integrated for that.

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AM335x - Changing VDD_MPU