kernel crash when reading ADC registers

Thanks Miroslav,

               The information you provided gave me a lot to chew on. I've read about the PRCM module and I understand it. I think the part that I'm missing is how to actually do it in ti_tscadc.c driver's probe function.

I can show you what I've tried so far:

attempt #1 Use kernel clock management functions declared in "include/linux/clk.h" : in ti_tscadc.c probe function insert this code:

CODE said:

    clk = clk_get(&pdev->dev, "adc_tsc_ick");
    if (IS_ERR(clk)) {
        dev_err(&pdev->dev, "failed to get TSC ick\n");
        err = PTR_ERR(clk);
        goto err_free_irq;
    }
    clk_prepare(clk);
    clk_enable(clk);
    clock_rate = clk_get_rate(clk);
    printk(KERN_INFO "ADC ick = %u @\n", clock_rate);
    
    clk = clk_get(&pdev->dev, "adc_tsc_fck");
    if (IS_ERR(clk)) {
        dev_err(&pdev->dev, "failed to get TSC fck\n");
        err = PTR_ERR(clk);
        goto err_free_irq;
    }
    clk_prepare(clk);
    clk_enable(clk);
    clock_rate = clk_get_rate(clk);
    printk(KERN_INFO "ADC fck = %u @\n", clock_rate);

I was hoping that this will enable both the ADC clock and the OCP clock because in "arch/arm/mach-omap2/clock33xx_data.c" source file we have a collection of clocks:

CODE said:

static struct omap_clk am33xx_clks[] = {
...
    CLK(NULL,    "adc_tsc_fck",        &adc_tsc_fck,    CK_AM33XX),
    CLK(NULL,    "adc_tsc_ick",        &adc_tsc_ick,    CK_AM33XX),
...
}

and the adc_tsc_fck and adc_tsc_ick are defined as follows:

CODE said:

static struct clk adc_tsc_fck = {
    .name        = "adc_tsc_fck",
    .clkdm_name    = "l4_wkup_clkdm",
    .parent        = &sys_clkin_ck,
    .ops        = &clkops_null,
    .recalc        = &followparent_recalc,
};

static struct clk adc_tsc_ick = {
    .name        = "adc_tsc_ick",
    .clkdm_name    = "l4_wkup_clkdm",
    .parent        = &l4_wkup_gclk,
    .enable_reg    = AM33XX_CM_WKUP_ADC_TSC_CLKCTRL,
    .enable_bit    = AM33XX_MODULEMODE_SWCTRL,
    .ops        = &clkops_omap2_dflt,
    .recalc        = &followparent_recalc,
};

And AM33XX_CM_WKUP_ADC_TSC_CLKCTRL is defined in "arch/arm/mach-omap2/cm33xx.h" like this:

#define AM33XX_CM_WKUP_ADC_TSC_CLKCTRL            AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00bc)

I thought that this is the register I'm looking for and I should just enable the clocks with "clk_prepare(clk)" and "clk_enable(clk)". Well, much to my regret it didn't work-- no change at all. The only thing that caught my eye was that the fck value was printed out as "25 000 000" in contrary to figure mentioned in TRM (spruh73h.pdf) in section:
12.2.2 TSC_ADC Clock and Reset Management
Here it says that adc_clk is typically 24 MHz.

attempt #2 Crudely write the value to the register in clock33xx_data.c : In "arch/arm/mach-omap2/clock33xx_data.c" "__init am33xx_clk_init(void)" function insert this code:

CODE said:

writel(readl(AM33XX_CM_WKUP_ADC_TSC_CLKCTRL) | 0x02, AM33XX_CM_WKUP_ADC_TSC_CLKCTRL);

Unfortunately that had no effect either.

attempt #3 Crudely write the value to the register in prcm.c :  In "arch/arm/mach-omap2/prcm.c" function "omap_prcm_arch_reset" insert this code:

CODE said:

writel(readl(AM33XX_PRM_REGADDR(0x400, 0xBC)) | 0x02, AM33XX_PRM_REGADDR(0x400, 0xBC));

I've also tried to disable power management through menuconfig and I've tried setting the 'performance' governor for CPU frequency scaling in menuconfig just in case it was the power management that disables the clocks but unfortunately these attempts have been fruitless too.

I accept that I'm only a beginner in kernel programming and may have done silly things in the examples above. Perhaps these registers should be handled differently. I'll be grateful for some online literature too on how to handle AM335x internals in kernel. Unfortunately there's not much comments in the source files and at times trawling it can be daunting for a beginner like me so please share a pointer in the right direction if you can.

Thanks and Regards,

Arturs