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Disable NAND ECC on Omap L137

Hi,

We have an Omap L137 we want to interface with a co-processor (small FPGA). We try to transfer data over the NAND interface, and have hence implemented a NAND interface in the FPGA. We make the communication start, but after a short while it stops. We have found the reason for this; we did'n have the ECC in the FPGA implementation. Hence we want to disable ECC on the Omap side as well.

How can we most easily do this?

Regards,

Tarjei

  • Hi Tarjei,

    Are you using the NAND driver (under MTD) which is part of the linux kernel? Do you want to disable the HW ECC support on NAND device? If yes, with reference to the below TI Wiki link, you can try disabling the HW ECC when configuring the kernel. http://processors.wiki.ti.com/index.php/Disabling_NAND_HW_ECC_support

    If you are using the ( raw) NAND driver without any OS like linux, you may have to go through the "NAND controller abstaraction layer" of NAND driver which constitutes the portion of code to initialize the controller ECC, enable/Disable ECC; ECC calculation, ECC read/write etc.

    http://processors.wiki.ti.com/index.php/StarterWare_NAND_Driver

     

    Regards,

    Shankari.

     

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  • We are using the raw NAND driver. And yes, you were correct, we had to change some parts in the driver itself. Commenting out the lines 951 and 1725 in ddc_nandFtl.c, as well as lines 1577 and 1796 in llc_nand.c did the trick.

    But this was not trivial to understand from the documentation; we really had to understand details in the code.

    Tarjei