TMS320C6657: PCIe example + PCIe boot

Q1. The breakout card is https://estore.ti.com/CI2EVMBOC--P2685.aspx. Techincal details: http://processors.wiki.ti.com/index.php/CI_Dual_EVM_Break_Out_Card

Q2. I need to double check, will let you know later.

Q3. There is a note with example code: http://www.ti.com/lit/an/sprabk8/sprabk8.pdf

Regards, Eric

For Q2, it only supports PCIE EP in PCIE boot mode.

Regards, Eric

hi Eric.

thank you so far.

for Q1: As I see the CI2EVMBOC (AMC-AMC-connector) is out of stoke and therefore no possible solution for me.

for Q2: Is is possible to boot the DSP via PCIe as EP and then to switch its role (DEVSTAT ?) to RC for further processing without rebooting? In the PCIe Use Cases (sprabk8) in 1.1 it is noted that a mode change (EP <-> RC) is possible via reset of the PCIe module. How is this reset realized? Anyway is booting via PCIe and then using as RC a clever solution or is an other boot mode more practial?

What would be an efficient setup (adapter cards) to test booting as EP and the communication as RC to EPs?

Best Regards, Gregor

Our 6657 PCIE test was done by using two DSP EVM cards connected via a break out card. Some forum members verified the PCIE between 6657 and FPGA, they may used their prototype board with direct PCIE connection or via a PCIE switch, I don't have the details.  

Why you want to boot 6657 in PCIE boot mode as an EP then switch to RC? This need to PCIE reset (see 2.13 Reset Considerations of SPRUGS6C) and re-configure the PCIE registers before enabling the link training. The PCIE EP configuration is done by BOOTROM, then how do you load/run/debug the new code changing EP role to RC role: change DEVSTAT, reset, PCIE configuration and enable link training? If you use CCS via JTAG, why not use the PDK test example directly via CCS? You can put the DSP in no-boot mode and use the PDK code configure it either as PCIE EP or RC.

Regards, Eric

hi Eric, in future we have a PCIe connection Host(RC)-FPGA(EP) and another PCIe connection DSP(RC)-FPGA(EP) on our board. Thats why our target is to boot this DSP in EP mode (from Host via FPGA tunnel) using the PCIE boot mode and afterwards using the DSP in RC mode to communicate with the FPGA

Q4: Is is clever to boot via PCIe and afterwards changing the role from EP->RC or better idea directly boot via SPI/I²C and then set RC mode just once?

Q5: As I want to develop the PCIe interface on DSP already before I get our board with connection to Host and FPGA, what is a clever way to verfiy the DSP PCIe interface in RC mode and (if still necessary booting in EP) mode?

Q6: Concerning your idea with the PDK test example: I am using CCS via JTAG at the moment. I can set my DSP at the EVM as RC or EP. But without a second PCIe device I cannot check any interconnection. Is there any point I did not see so far?

Our setup:  TMDSEVM6657LS (DSP-C6657  +  FPGA-XC3S200AN)  EVM board.