We have a new HW design based on BBB and SK. We are attempting to use two ethernet ports at 100Mbs. We use TI 83848K PHYs. The PHYs are addressed as 1, 2 (address 0 puts this PHY into special mode).
I have setup a new routine, mii2_init, that uses the following pin mux setup:
/* Module pin mux for mii2 */
static struct pinmux_config mii2_pin_mux[] = {
{"gpmc_wpn.mii2_rxerr", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a0.mii2_txen", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
{"gpmc_a1.mii2_rxdv", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a2.mii2_txd3", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
{"gpmc_a3.mii2_txd2", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
{"gpmc_a4.mii2_txd1", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
{"gpmc_a5.mii2_txd0", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
{"gpmc_a6.mii2_txclk", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
{"gpmc_a7.mii2_rxclk", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a8.mii2_rxd3", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a9.mii2_rxd2", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a10.mii2_rxd1", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
{"gpmc_a11.mii2_rxd0", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
{"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
{NULL, 0},
};
The 2nd eth port HW design is patterned after the StarterKit with the addition of the mii2_rxerr signal.
mii2_init is added to my evm_dev_cfg struct for my board and have verified it is being called. I call am33xx_cpsw_init(AM33XX_CPSW_MODE_MII, "0:01", "0:02") in my boards setup routine.
eth0 works, I can ping, dhcp, etc. from the port. I know eth1 phy is working as link status is reported correctly when I connect and disconnect this port to a switch. We have link LEDs connected to the PHYs that show link status correctly for both ports.
I can issue ifup and ifconfig commands to eth1 and they seem successful. But there is never any activity showing at the port whether using ping, dhcp, etc. We have verified that there is activity on the MII lines between the PHY and the am335x port for eth1 that is identical in nature and rate as we see on eth0.
What am I missing?
