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Problem running SRIO Benchmark in MCSDK using External Switch on EVMK2H

We are having a problem with our Keystone II EVMK2H and XTCIEVMK2X boards getting the SRIO_TputBenchmarkingK2HC66TestProject project working through a NAT-MCH SRIO switch. The default internal loopback version of this program works fine but when setup to use an external switch it hangs in SRIO Lane Configuration. We running using CCS over JTAG and the XDS200 onboard emulator. The backplanes routes ports 8 thru 11 to the MCH SRIO switch Fabric D-G ports. Everything looks good there. In benchmark.h we change “IS_BOARD_TO_BOARD” to TRUE and “IS_OVER_ EXTERNAL_SRIO_SWITCH” to TRUE. When we run the program it hangs in one of two places:

1) In srio_laneconfig.c
//SB PLL Status Poll
do
{
pllstat = CSL_SrioSerdesGetStatus(CSL_SRIO_SERDES_CFG_REGS, 4);
}while(pllstat == CSL_SERDES_STATUS_PLL_NOT_LOCKED);

Note: pllstat is continuously 0

OR

2) We have seen it get by there and then again In srio_laneconfig.c it fails the 5-10 second loop:
while (CSL_tscRead() < tscTemp)
{
if (CSL_SRIO_IsPortOk (hSrio, port) == TRUE)
{
sprintf (statusText,"");
break;
}
}
and says: "Debug: SRIO port 0 is NOT operational"

We are using the default four x1 lanes of 5Gbps (each lane). We have to manually enable the SRIO Switch port connected to the AMC slot (set for a 4 x1 5G/s lanes) becuase the Keystone II boards to not have the MMC code implemented so uTCA E-Keying does not work.

Can someone help us understand why the PLL is not getting locked ot why it is failing at thes points? Is it because it it not seeing the proper SERDES signal from the switch? The switch is not seeing a link either.

We are running the CONSUMER on Core 0 of the first board but never get to start the PRODUCER on Core 1 of the other board because we cant get by this point.

Todd

  • Hi Todd,

    For My Understanding: You are not change the CORE_TO_INITIALIZE_SRIO definition to PRODUCER_CORE (core 1) on Producer side code. That only producer core 1 not initialize the SRIO. In Board to Board communication user need to change the CORE_TO_INITIALIZE_SRIO definition on producer side code.

    #define CORE_TO_INITIALIZE_SRIO           PRODUCER_CORE

    If you want to test the example project on board to board, you need to change the following definition on Consumer/Producer side code(benchmarking.h file).

    Consumer side code changes:

    #define IS_BOARD_TO_BOARD                 TRUE

    #define IS_OVER_EXTERNAL_SRIO_SWITCH      TRUE

    #define USE_LOOPBACK_MODE                 FALSE

    Producer side code changes:

    #define IS_BOARD_TO_BOARD                 TRUE

    #define IS_OVER_EXTERNAL_SRIO_SWITCH      TRUE

    #define USE_LOOPBACK_MODE                 FALSE

    #define CORE_TO_INITIALIZE_SRIO           PRODUCER_CORE

    Please take a look at “\ti\pdk_keystone2_3_00_03_15\packages\ti\drv\srio\test\tput_benchmarking\src\Readme.txt” file for more information about configure EVM as Consumer/Producer mode.

    Thanks,

  • Hi,

     

    Thank you for your reply.

     

    I am just running the CONSUMER on Core 0 now but it is not locking the PLL. Here are my settings:

     

    #define IS_BOARD_TO_BOARD                 TRUE

    #define IS_OVER_EXTERNAL_SRIO_SWITCH      TRUE

    #define USE_LOOPBACK_MODE                 FALSE

    #define CORE_TO_INITIALIZE_SRIO           CONSUMER_CORE

     

    Running the PRODUCER on core 1 of a second board will not make a difference because the CONSUMER side will not get past this point. See my initial power for where exactly it is hanging up.

     

    It looks like it is Physical Layer issue with the maybe the Link Training or something like that?

     

    Below is the output from the Producer. I am trying to find out if the problem is on the TI side or the NAT-MCH SRIO side. Any help in debugging would be appreciated.

     

    [C66xx_0]

     

    pllMultiplierREGs : 0xf

    CSL_PLLC_REGS : 36765696

    CPU Frequency : 983040000 Hz

    PLL base frequency: 122880000 Hz

    PLL multiplier : 8

    ********************************

    *********** CONSUMER ***********

    ********************************

    WARNING: Please ensure that the CONSUMER is executing before running the PRODUCER!!

    Debug: Waiting for module reset...

    Debug: Waiting for module local reset...

     

    Kind Regards,

    Todd

  • Hi Todd,

    I have not worked on similar setup.

    Please take a look at “\ti\pdk_keystone2_3_00_04_18\packages\ti\drv\srio\test\tput_benchmarking\docs\SRIO_Benchmarking_Example_Code_Guide.doc” file for more information about configure EVM as Consumer/Producer mode.

    Thanks,

  • hi todd,

    Have you contact NAT?  My first MCH had a bad SRIO connection.  NAT is actually very helpful.  I enjoyed working with the very much.  They diagnosed the problem quickly and sent me a replacement (and a box of baked goods :) )

    Also, when I was trying to get the port-ok with my custom board, we were having problems with SERDES settings and TI recommended changing some of the bits regarding equalizer bits.  I don't have my computer in front of me, but this was the post I made when I was doing this testing.  It has the reference manual pages so maybe you can see if the register will help you?  http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/165949.aspx

    And in the end - to be honest - on our custom board - it turns out our clock was just .002 off and it was causing all the problems.

    I remember how frustrating it was to not be able to get a port ok.  I have lots of advice once you get passed that part but my experience trying to get port ok is like speghetti in my brain - I think I have blocked it out!

    Good luck,

    Brandy

  • Hi Brandy,

    Thank you for the pointers. Your contribution to e2e forum was very much helpful.

    Your effort is very much appreciated.