I'm trying to use SPI to program a FPGA with mi C6678 DSP (CHARLEN = 8 bit)
When i start tre transaction i always see that the Bit Error Flag is set
What could be the problem?
This is the code i'm using for the transmission
bool CSPI::Transmit(UINT8* pData, UINT32 nOfBytes)
{
volatile int i;
//clear BITERRFLG
rSPI_FLG &= (1<<4);
for (i = 0; i < nOfBytes; i++)
{
//TXINTFLG Indicate that the transmit buffer (TXBUF) is empty and a new data can be written to it.
//TXFULL Indicate that the TX Shift Register is full and a new data cannot be written to it.
while ( (!(rSPI_FLG & (1<<9))) && (rSPI_BUF & (1<<29)) ) ;
rSPI_DAT1 = pData[i];
}
//Check the BITERRFLG: This bit is set when a mismatch of internal transmit data and transmitted data is detected.
if (rSPI_FLG & (1<<4))
return false; //1 = A bit error occurred.
else
return true; //0 = No bit error occurred.
}
