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TimerTick failure

Other Parts Discussed in Thread: SYSBIOS

Hi,

We are using timer functionality (in sysbios) to trigger an interrupt for every 10ms on C6678. 

However randomly (sometimes after 10minutes and other times after few days) we are seeing that interrupt is not getting generated on all cores.

Any ideas what makes these timers not generate interrupts? 

Below is our configuration.

var Timer = xdc.useModule('ti.sysbios.timers.timer64.Timer');

Timer.timerSettings[8].ownerCoreId = 0;

var timerParams = new Timer.Params();
timerParams.period = 10000;
Timer.create(8,'&timerTick',timerParams);

Thanks in advance,

Regards, Kishor

  • Kishor,

    What board are you using?
    Which version of CCS are you using?
    Which rev of SYS/BIOS are you using?

    The hardware does not skip interrupts or miss interrupts unless there is noise on the voltage rails or clock lines. If you are using a TI-recommended EVM, then this would not be a direction to be concerned with.

    Most missed interrupts are due to overloading the processor between interrupts to the point that the processor is busy from after one interrupt is generated until after the next interrupt is generated. In that case, it will appear that you have missed an interrupt. This can be checked for using the missed interrupt logic in the C66x core; search for IDROP in the Corepac User Guide for more information.

    If you are using a Periodic event through SYS/BIOS, then it is not actually an interrupt but is an SWI. Dealing with that and looking into what debug features there are for accumulating them or anything else, would be best suited for the TI-RTOS forum. If this is what you are doing, then we can request a moderator to move this thread there for you.

    In any case, look for processing that is taking too much time and causing interrupts or SWIs to overlap with each other. The TI-RTOS Execution Graph or other graphical displays may help you to see what things are taking up so much time. You might be able to setup a test in your timer function to see if it has been too long between interrupts, halt on a breakpoint there, then look at the TI-RTOS timestamps and graphs to see what had been happening most recently.

    Regards,
    RandyP
  • Hi Randy,
    Thanks for the detailed explanation.

    Our observations were on c6678EVM in CCS 5.1.1.00031 with sys/bios 6_33_06_50.

    I understand that timer interrupts are routed as Hardware interrupts. Since we were not getting any event ISRs for every 10ms as configured, it is a concern. I shall take this up in RTOS forum.

    Thanks again,

    Regards
    Kishor