Ethercat Synchronization problem with distributed clock

Hi Laurence,

I will forward this to the Industrial team.

I can give some other details:
- I am using sdk 1.0.0.8
- I run this test on platform ice v2
- the bus load during the test is 2.3%
- my source code is very very close to the code source of TI example: ecat_appl and I have made the same test with this example source code: I have the same problem.

Thanks for all the help anyone can give me !

Laurence

Hi,

Can you confirm the SDK version - 1.0.0.8 is very old.

www.ti.com/.../sysbiossdk-ind-sitara

The latest on 1.1 base line is 1.1.0.8
The latest on 2.1 baseline is 2.1.0.1

2.1 is recommended for new designs...

Sorry: it is the 1.1.0.8 !

Laurence,

can you please confirm the bus load too? This seems to be quite low for a 62.25 us cycle. Isn't there new data for every cycle? Otherwise why do you need to run such fast? We are missing the details on your app here...

Actually we would need to know CPU load not bus load. At such fast cycle times the IRQs alone cause a big CPU load on the ARM side. If there are other high load tasks you may need to change task priorities to ensure the system stays in sync.

Regards,

 

I made several tests yesterday....

First of all, I run the test with the source code provided by TI in the example ecat_appl.

I enabled distributed clock and configured the cycle time with the values I will need for my own application: bus cycle time 500us, sync0 cycle time 62.5us, sync1 cycle time 500us.

I work with an ice v2 platform.

I ude the following configuration:

• My code is compiled with CCSv6.
• I use sdk 1.1.0.8.
• The XDCTools version is 3.30.6.67_core
• The SYS/BIOS is 6.41.4.54.

I have verified tht the cpu load is not so important.

After a little time in operational state, I have always the same error : FATAL SYNC ERROR.

Then, I have decided to change the configuration and turned back to a former configuration:

• My code is compiled with CCSv6.
• I use sdk 1.1.0.4
• The XDCTools version is 3.25.5.94
• The SYS/BIOS is 6.33.5.46

I let the test running all night and I still have NO ERROR.

It seems to have a regression, isn't it ?

Is someone able to explain me that ?

Thanks a lot,

Laurence

Hello everybody,

As I explained in my former message, I have noticed that I don't have this fatal sync error with the configuration I used before.

I tried to understand what are the cause of this error.

In the code, I saw that this fatal sync error 0x002C is generated by a watchdog on ISR SYnc0 (no ISR during 1ms). I have light on led on each ISR (PDI, SYN, SYNC) and I see something very surprising: it seems to still have ISR SYNC0 but no more ISR PDI. And at the same time I still have Ethercat Frames at 500us....

Can someone help me please ?

Thanks a lot,

LAurence

Hello Frank,

So I have done what you suggested me to do: I have installed the sdk 2.1.0.1 and I have patched the source code of ethercat_slave with SSC 5.11 stack. All of that was a bit difficult to understand because thera are lots of difference bteween sdk 1.1.0.8 and sdk 2.1.0.1....
Finally, I first tried the full ecat application in debug mode.
I have configured my ethercat master with kpa studio at 500us, enabled distributed clock with sync0 at 62.5us and sync1 at 500us and launch the operational mode.... After 2 days running, no error !!!! GREAT.
Then I tried the full ecat application in release mode. I flashed the new bootloader found in the sdk and flash the new application mode and boot in SPI mode. Then I launch the operational mode in the same configuration as before and, after 3hours running, FATAL SYNC ERROR !!!!!
So, the problem seems not to be fixed !!! Did you made this test in flash ?
As the test is OK in debug mode and NOK in flash mode, I think the problem could be in the bootloader; right ?
Please, can you help me to find what is happening ?
Thanks a lot,

Regards,
Laurence

Laurence,

I am not aware of the test details in use by our engineering team. However I will now file this as a bug in our internal systems. There should be no difference between the build modes.

Currently I would also guess that the issue is due to difference in HW setup from debug mode (GEL file) or boot loader. If this is not the case it could be due to compiler optimizations changing the timings in the application. Which is even more difficult to debug I assume.

Regards,

Hello Frank,

So, I’ve made several tests, projects… and I finally succeed in a version stable which can run during all the week-end without a sync error !!!

But I don’t know why…. That is to say that suddenly everything began to run normally without any change…

It’s a bit strange but I don’t have enough time to focus on that …

Because, I have a new BIG problem !!!!

 

The software download by FOE is not working in the sdk 2.1.0.1 (and it was working with the former sdk).

If I use KPA Studio, the transfer begins but a few seconds after the beginning I have a master general error 0x8003.

Is it possible to have any feedback on this issue ?

 

Thanks a lot,

 

Laurence

Hello,

 

I’ve just finished to install the new release sdk 2.2.1.1 with all the requested soft :

• Code Composer Studio version CCS 6.1.1.00022
• SYS/BIOS 6.42.2.29 Real Time Operating System
• XDC Tool 3.31.2.38_core
• Compiler GNU v4.8.4 (Linaro)
• NDK 2.24.3.35

Then, I have patched the project Texas ecat_appl with Beckhoff source code SSC_V5i11.zip.

I use KPA Studio as master, I scan the bus, configure the Distributed Clock with a bus at 500us, sync0 at 62 us and sync1 at 496us.

I attach the slave, ask for op mode but the slave oinly reach the safe_op mode and I have a 0x002D – No sync error.

 

Did you test that solution ?

 

Thanks a lot for your help.

 

Regards

Hello,

I dont’ manage to run the patch.

I use the Windows Patch Utility from gnuwin32 and it doesn’t work .

You can see the Dos window in attachment.

Can you tell me how to do ?

 

Thank you

Laurence,

SDK 2.1.1.2 has been published 4 days ago. It still uses the same SW base (CCS, SYSBIOS, NDK, ..etc). Could you try it out?
downloads.ti.com/.../index_FDS.html

I am not sure if it is related but there was a fixed for ethercat (see SDOCM00120424):
processors.wiki.ti.com/.../SYSBIOS_Industrial_SDK_02.01.01_Release_Notes

A.