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66AK2H14 - DDR3 works only at 400MHz

Sakthi Annamalai
Intellectual 610 points
Other Parts Discussed in Thread: TMS320C6678, 66AK2H14

Hi,

We have made a customized board with Quad Processor Board (three TMS320C6678 + One 66AK2H14). In our JTAG Chain 66AK2H14 is the first processor followed by three TMS320C6678 processor.

We have Bypassed the 66AK2H14 from the JTAG chain and we have tested the other three TMS320C6678 processor.

We can able to run the GEL file(Successfully Initialized) and we can able to test the three TMS320C6678.

We have bypassed the three TMS320C6678 and we trying to test the 66AK2H14 processor alone.

DSP input clock is 122.88MHz

ARM input clock is 125MHz

DDR3 input clock is 66.66MHz

For testing the 66AK2H14 we have bypassed the three TMS320C6678. So that the board as like 66AK2H14EVM.


66AK2H14 has two DDR3 controller. In EVM Both the controller are used. But in our customized board we are using the DDR3A controller.

we are using Micron DDR3 -2GB density (MT41K256M16HA-125 IT) and trying 64Bit. We have taken the timing parameters from the Micron Data sheet and the register values are framed based on the excel sheet provided by TI for keystone II
(Customized K2 DDR3 Register Calc v1p60).

Maximum speed supported is 1333MHz. But on the maximum speed we can't able to access the DDR3 through JTAG.

We have downgraded the speed to 400MHz, then we can able to access the first 1GB. The remaining 1GB we can't able to access.


I have also attached the Excel Sheet and the Working Gel File for your reference.

Please let us know what could be the issue for other higher speed.

Regards,

Sakthi.A

0572.xtcievmk2x - K2H14 - Working.gelCustomized K2 DDR3 Register Calc v1p60.xlsx

  • 0
    TI__Mastermind 46460 points

    Sokthi,

    You should be able to run the 66AK2H14 DDR3 at 1600MT/s (800MHz DDRCLK) once you resolve your issues.

    Since you are able to run at a lower rate, you have basic connectivity and functionality.  You need to refine the PHY and Controller configuration to reach higher speeds.  I cannot review the timing worksheet in detail at this time.  You will need to double-check the settings.  Since you are using an x16 device, make sure you are using the 2KB page timing for items like tFAW.  However, the column size is still 10bits / 1KB for this device.

    You are using four 2Gb SDRAMs in a 64bit topology.  This only results in 8Gb or 1GB.  Why do you think you should be able to address 2GB?

    Have you created reports showing the length matching rules have been met?  Please provide those reports.

    Tom

  • 0 in reply to Tom Johnson 16214
    TI__Mastermind 46460 points

    Sokthi,

    Also, unless you are making a board that will be working with cellular data requiring the processing at a multiple of 122.88MHz, I recommend that you provide a 100MHz or 125MHz reference clock to SYSCLK or ALTCORECLK.

    Tom

  • 0 in reply to Tom Johnson 16214
    Intellectual 610 points

    0207.Customized K2 DDR3 Register Calc v1p60.xlsxHi Tom,

    please find our reply for your query

    1.You need to refine the PHY and Controller configuration to reach higher speeds

    Reply : We have followed the PHY & controller configuration as per TI Excel sheet . Please find attached the excel sheet.

    2. you are using an x16 device, make sure you are using the 2KB page timing for items like tFAW.

    Reply : We configured for 2KB page size and TFAW as per 2KB page size

    3.You are using four 2Gb SDRAMs in a 64bit topology. This only results in 8Gb or 1GB.

    Reply : The micron part : MT41K256M16HA-125 IT is 4Gb (512MB)density part. We are using 4no's of 4Gb part,such that we have 2GB.

    4.Have you created reports showing the length matching rules have been met? Please provide those reports

    Reply: Please provide us the sample length matching excel sheet for 66AK2H14.

    Thanks
    Sakthi.A

  • 0 in reply to Tom Johnson 16214
    Intellectual 610 points
    Hi Tom,

    Please find the reply for your query

    1.I recommend that you provide a 100MHz or 125MHz reference clock to SYSCLK or ALTCORECLK?

    Reply : We will test with 125MHz clock ALTCORECLK by bypassing the SYSCLK and let you know the update.

    Regards,
    Sakthi.A
  • 0 in reply to Sakthi Annamalai
    TI__Mastermind 46460 points

    Sakthi,

    Please see below for an example of a spreadsheet validating the length matching rules are met.

    Tom

    2678.EVM_DDR3_Rules.xls

  • 0 in reply to Sakthi Annamalai
    TI__Mastermind 42545 points

    Hi Sakthi,

    The K2H can only directly address 2GB of memory using the 80000000 to FFFFFFFF address range in the memory map. Extending the addressing beyond 2GB requires programming the MPAX inside MSMC. Have you properly programmed the device to address your 4GB?

    Regards,

    Bill

  • 0 in reply to Tom Johnson 16214
    Intellectual 610 points

    Hi Tom,

    1.I  recommend that you provide a 100MHz or 125MHz reference clock to SYSCLK or ALTCORECLK.

             We have  122.88MHz on SYSCLK and 125MHz on ALTCORECLK by default.   Our default CORECLKSEL is 0 to choose the SYSCLK to main PLL.  

    I have made the  CORECLKSEL as 1 by pulling up to select the ALTCORECLK(125MHZ is fine). When we tried to access K2H14 through gel file it shows error  in DNUM==0  step in gel file .

    Please find attached the error log.

    Regards,

    Sakthi.A

    Fullscreen ALTCLOCK.txt Download 
    C66xx_0: GEL Output: 
Connecting Target...
C66xx_0: GEL Output: TCI6638K2K GEL file Ver is 1.3 
C66xx_0: GEL: Error while executing OnTargetConnect(): identifier not found: DNUM 	at (DNUM==0) [xtcievmk2x - K2H14.gel:631] 	at Global_Default_Setup_Silent() [xtcievmk2x - K2H14.gel:566] 	at OnTargetConnect() .