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AM335X Qt + EGL with high resolution

Other Parts Discussed in Thread: OMAP-L138, TLV320AIC3106, TPS65910, WL1271

Hello,

I am trying to run some Qt example applications using OpenGL (gles2) on the am335x StarterKit. These run fine with a resolution up to 1920x1080. But our application needs the LCD controller to be configured for 2048x2040. I have that resolution also working when not using OpenGL. Now, when I launch an OpenGL application with the 2048x2040 resolution, it fails with the following error:

root@am335x-evm:~# /usr/share/qt5/examples/opengl/2dpainting/2dpainting -platform eglfs

PVR: Hint: Setting ParamBufferSize to 33554432

PVR: Hint: Setting WindowSystem to libpvrDRMWSEGL_FRONT.so

PVR:(Error): OpenServices: Cannot open device driver /dev/omapdrm_pvr. [140, /pvr_bridge_u.c]
PVR:(Error): PVRSRVConnect: Unable to open connection. [361, /bridged_pvr_glue.c]
Could not initialize egl display
Cannot initialize PVR2D contex

Running the same command with strace gives the following output, which suggest a memory allocation problem when trying to open omapdrm_pvr

...

open("/usr/lib/libpvr2d.so.1", O_RDONLY|O_CLOEXEC) = 5
read(5, "\177ELF\1\1\1\0\0\0\0\0\0\0\0\0\3\0(\0\1\0\0\0\10\30\0\0004\0\0\0"..., 512) = 512
fstat64(5, {st_mode=S_IFREG|0644, st_size=147145, ...}) = 0
mmap2(NULL, 50288, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_DENYWRITE, 5, 0) = 0xb408a000
mprotect(0xb408f000, 28672, PROT_NONE)  = 0
mmap2(0xb4096000, 4096, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 5, 0x4000) = 0xb4096000
close(5)                                = 0
open("/dev/omapdrm_pvr", O_RDWR)        = -1 ENOMEM (Cannot allocate memory)
write(2, "PVR:(Error): OpenServices: Canno"..., 94PVR:(Error): OpenServices: Cannot open device driver /dev/omapdrm_pvr. [140, /pvr_bridge_u.c]
) = 94
write(2, "PVR:(Error): PVRSRVConnect: Unab"..., 82PVR:(Error): PVRSRVConnect: Unable to open connection. [361, /bridged_pvr_glue.c]
) = 82
...

Here is the output of the gfx_check.sh script:

WSEGL settings
[default]
ParamBufferSize=33554432
WindowSystem=libpvrDRMWSEGL_FRONT.so
DisableHWTQTextureUpload=1

------
ARM CPU information
processor    : 0
model name    : ARMv7 Processor rev 2 (v7l)
BogoMIPS    : 274.24
Features    : half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpd32
CPU implementer    : 0x41
CPU architecture: 7
CPU variant    : 0x3
CPU part    : 0xc08
CPU revision    : 2

Hardware    : Generic AM33XX (Flattened Device Tree)
Revision    : 0000
Serial        : 0000000000000000
------
SGX driver information
Version SGX_DDK_Linux_CustomerTI sgxddk 19 1.9@2253347 (release) omap335x_linux
System Version String: None
------
Framebuffer settings

mode "2048x2040"
    geometry 2048 2040 2048 2040 32
    timings 0 0 0 0 0 0 0
    accel true
    rgba 8/16,8/8,8/0,0/0
endmode

Frame buffer device information:
    Name        :
    Address     : 0x8d100000
    Size        : 16711680
    Type        : PACKED PIXELS
    Visual      : TRUECOLOR
    XPanStep    : 1
    YPanStep    : 1
    YWrapStep   : 0
    LineLength  : 8192
    Accelerator : No
------
Rotation settings
0
------
Kernel Module information
Module                  Size  Used by
ipv6                  306868  24
cryptodev              33612  0
arc4                    1587  2
hid_generic              901  0
usbmouse                2640  0
wl12xx                 58126  0
usbhid                 28525  0
wlcore                180472  1 wl12xx
mac80211              358155  2 wl12xx,wlcore
cfg80211              218405  2 mac80211,wlcore
musb_dsps               7807  0
musb_hdrc              69089  1 musb_dsps
udc_core               11604  1 musb_hdrc
joydev                  9168  0
usbcore               190325  3 musb_hdrc,usbhid,usbmouse
evdev                  10085  0
snd_soc_evm             5106  0
pm33xx                  4633  0
omapdrm_pvr           335287  0
wlcore_sdio             6142  0
omap_rng                4470  0
lis3lv02d_i2c           3245  0
rng_core                7660  2 omap_rng
lis3lv02d              15679  1 lis3lv02d_i2c
snd_soc_tlv320aic3x    41117  1
input_polldev           4559  1 lis3lv02d
musb_am335x             1240  0
rtc_omap                7578  1
omap_wdt                4347  0
ti_am335x_tsc           5415  0
ti_am335x_tscadc        5622  1 ti_am335x_tsc
gpio_keys               8092  0
leds_gpio               3445  0
------
Boot settings
console=ttyO0,115200n8 quiet consoleblank=0 omapfb.debug=y drm.debug=0x3f vram=32M omapfb.vram=0:32M root=/dev/nfs nfsroot=172.29.4.89:/export/rootfs,nolock rw ip=dhcp
------
Linux Kernel version
Linux am335x-evm 4.1.13-g8dc6617 #3 PREEMPT Wed Mar 2 18:32:18 CET 2016 armv7l GNU/Linux

So my question is: what needs to be done to be able to allocate enough memory to support opengl with a 2048x2040 resolution?

Regards,
Johann

  • Hi,

    I have forwarded this to the software team.
  • Hi Johann,

    -What type of screen do you hook to the LCD TFT?

    -What is the frame rate/pixel rate used for your 1920x1080 use case?

    About the LCD interface:

    a) 2048 x 2048 is the max supported resolution on the AM335x LCD module however there are some limiting factors as mentioned at page 194 of the AM335x data manual - SPRS717I:

    - The max pixel CLK support in LCD raster mode is 126Mhz so if you need to comply to a given LCD display standard you might not be able to support standard that need an higher pixel CLCK.

    - The pixel-per-line need to be multiple of 16 (see ppllsb/pplmsb bit fields).

    - The max frame rate can be approximate using the below formula:

    http://processors.wiki.ti.com/index.php/OMAP-L1x/C674x/AM1x_LCD_Controller_%28LCDC%29_Throughput_and_Optimization_Techniques#LCDC_Maximum_Resolution

    The formula is for OMAP-L138/C6748 but the same principal apply to AM335x.

    b) I guess that the Linux LCD driver was not tested for 2048x2048 but probably with resolution like 1280x960 at frame rate that use pixel clk below 126Mhz.

    I have seen the below page that help to calculate some resolution/frame rate may be it can help to double the settings you want to use:

    http://www.monitortests.com/pixelclock.php

    A.

  • Hi AnBer,

    Thank you for your answer but I think we have a misunderstanding. I don't have an issue with setting the LCD controller output resolution. I have managed to set this resolution to 2048x2040. My problem is that the omapdrm_pvr module seems to require allocating an amount of memory which depends on the resolution, and that fails with 2048x2040.


    As to the answers to your questions (although I believe they are not related to my problem):

    - We hook a custom device of our own to the LCD controller and this device can take in any resolution and allows us to display it on a standard 4K display. Again, I can run Qt application examples fine with 2048x2040 resolution when NOT using opengl acceleration (that is using -platform linuxfb when launching said Qt application).

    - For now, we set the LCDC at a 65MHz pixel rate, for an approximate refresh rate of 14Hz with 2048x2040. (I used the same pixel clock with 1920x1080 with a higher refresh rate but 1920x1080 is not a target resolution for us, I only mentionned it for a reference of what worked.) And we are not very much concerned about refresh rate for now.

    Below is the content of my .dts file which contains the display timings:

    /*
     * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
     *
     * This program is free software; you can redistribute it and/or modify
     * it under the terms of the GNU General Public License version 2 as
     * published by the Free Software Foundation.
     */

    /*
     * AM335x Starter Kit
     * www.ti.com/.../tmdssk3358
     */

    /dts-v1/;

    #include "am33xx.dtsi"
    #include <dt-bindings/pwm/pwm.h>
    #include <dt-bindings/interrupt-controller/irq.h>

    / {
        model = "TI AM335x EVM-SK";
        compatible = "ti,am335x-evmsk", "ti,am33xx";

        cpus {
            cpu@0 {
                cpu0-supply = <&vdd1_reg>;
            };
        };

        memory {
            device_type = "memory";
            reg = <0x80000000 0x10000000>; /* 256 MB */
        };

        vbat: fixedregulator@0 {
            compatible = "regulator-fixed";
            regulator-name = "vbat";
            regulator-min-microvolt = <5000000>;
            regulator-max-microvolt = <5000000>;
            regulator-boot-on;
        };

        lis3_reg: fixedregulator@1 {
            compatible = "regulator-fixed";
            regulator-name = "lis3_reg";
            regulator-boot-on;
        };

        wl12xx_vmmc: fixedregulator@2 {
            pinctrl-names = "default";
            pinctrl-0 = <&wl12xx_gpio>;
            compatible = "regulator-fixed";
            regulator-name = "vwl1271";
            regulator-min-microvolt = <1800000>;
            regulator-max-microvolt = <1800000>;
            gpio = <&gpio1 29 0>;
            startup-delay-us = <70000>;
            enable-active-high;
        };

        vtt_fixed: fixedregulator@3 {
            compatible = "regulator-fixed";
            regulator-name = "vtt";
            regulator-min-microvolt = <1500000>;
            regulator-max-microvolt = <1500000>;
            gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
            regulator-always-on;
            regulator-boot-on;
            enable-active-high;
        };

        leds {
            pinctrl-names = "default";
            pinctrl-0 = <&user_leds_s0>;

            compatible = "gpio-leds";

            led@1 {
                label = "evmsk:green:usr0";
                gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
                default-state = "off";
            };

            led@2 {
                label = "evmsk:green:usr1";
                gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
                default-state = "off";
            };

            led@3 {
                label = "evmsk:green:mmc0";
                gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
                linux,default-trigger = "mmc0";
                default-state = "off";
            };

            led@4 {
                label = "evmsk:green:heartbeat";
                gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
                linux,default-trigger = "heartbeat";
                default-state = "off";
            };
        };

        gpio_buttons: gpio_buttons@0 {
            compatible = "gpio-keys";
            #address-cells = <1>;
            #size-cells = <0>;

            switch@1 {
                label = "button0";
                linux,code = <0x100>;
                gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
            };

            switch@2 {
                label = "button1";
                linux,code = <0x101>;
                gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
            };

            switch@3 {
                label = "button2";
                linux,code = <0x102>;
                gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
                gpio-key,wakeup;
            };

            switch@4 {
                label = "button3";
                linux,code = <0x103>;
                gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
            };
        };

        backlight {
            compatible = "pwm-backlight";
            pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
            brightness-levels = <0 58 61 66 75 90 125 170 255>;
            default-brightness-level = <8>;
        };

        sound {
            compatible = "ti,da830-evm-audio";
            ti,model = "AM335x-EVMSK";
            ti,audio-codec = <&tlv320aic3106>;
            ti,mcasp-controller = <&mcasp1>;
            ti,codec-clock-rate = <24000000>;
            ti,audio-routing =
                "Headphone Jack",       "HPLOUT",
                "Headphone Jack",       "HPROUT";
        };

        panel {
            compatible = "ti,tilcdc,panel";
            pinctrl-names = "default", "sleep";
            pinctrl-0 = <&lcd_pins_default>;
            pinctrl-1 = <&lcd_pins_sleep>;
            status = "okay";
            panel-info {
                ac-bias           = <255>;
                ac-bias-intrpt    = <0>;
                dma-burst-sz      = <16>;
                bpp               = <32>;
                fdd               = <0x80>;
                sync-edge         = <0>;
                sync-ctrl         = <1>;
                raster-order      = <0>;
                fifo-th           = <0>;
            };
            display-timings {
                2048x2040 {
                    hactive         = <2048>;
                    vactive         = <2040>;
                    hback-porch     = <80>;
                    hfront-porch    = <32>;
                    hsync-len       = <48>;
                    vback-porch     = <12>;
                    vfront-porch    = <4>;
                    vsync-len       = <10>;
                    clock-frequency = <65000000>;
                    hsync-active    = <0>;
                    vsync-active    = <0>;
                };
            };
        };
    };

    &am33xx_pinmux {
        pinctrl-names = "default";
        pinctrl-0 = <&gpio_keys_s0 &clkout2_pin &ddr3_vtt_toggle>;

        ddr3_vtt_toggle: ddr3_vtt_toggle {
            pinctrl-single,pins = <
                0x164 (PIN_OUTPUT | MUX_MODE7)    /* ecap0_in_pwm0_out.gpio0_7 */
            >;
        };

        lcd_pins_default: lcd_pins_default {
            pinctrl-single,pins = <
                0x20 (PIN_OUTPUT | MUX_MODE1)    /* gpmc_ad8.lcd_data23 */
                0x24 (PIN_OUTPUT | MUX_MODE1)    /* gpmc_ad9.lcd_data22 */
                0x28 (PIN_OUTPUT | MUX_MODE1)    /* gpmc_ad10.lcd_data21 */
                0x2c (PIN_OUTPUT | MUX_MODE1)    /* gpmc_ad11.lcd_data20 */
                0x30 (PIN_OUTPUT | MUX_MODE1)    /* gpmc_ad12.lcd_data19 */
                0x34 (PIN_OUTPUT | MUX_MODE1)    /* gpmc_ad13.lcd_data18 */
                0x38 (PIN_OUTPUT | MUX_MODE1)    /* gpmc_ad14.lcd_data17 */
                0x3c (PIN_OUTPUT | MUX_MODE1)    /* gpmc_ad15.lcd_data16 */
                0xa0 (PIN_OUTPUT | MUX_MODE0)    /* lcd_data0.lcd_data0 */
                0xa4 (PIN_OUTPUT | MUX_MODE0)    /* lcd_data1.lcd_data1 */
                0xa8 (PIN_OUTPUT | MUX_MODE0)    /* lcd_data2.lcd_data2 */
                0xac (PIN_OUTPUT | MUX_MODE0)    /* lcd_data3.lcd_data3 */
                0xb0 (PIN_OUTPUT | MUX_MODE0)    /* lcd_data4.lcd_data4 */
                0xb4 (PIN_OUTPUT | MUX_MODE0)    /* lcd_data5.lcd_data5 */
                0xb8 (PIN_OUTPUT | MUX_MODE0)    /* lcd_data6.lcd_data6 */
                0xbc (PIN_OUTPUT | MUX_MODE0)    /* lcd_data7.lcd_data7 */
                0xc0 (PIN_OUTPUT | MUX_MODE0)    /* lcd_data8.lcd_data8 */
                0xc4 (PIN_OUTPUT | MUX_MODE0)    /* lcd_data9.lcd_data9 */
                0xc8 (PIN_OUTPUT | MUX_MODE0)    /* lcd_data10.lcd_data10 */
                0xcc (PIN_OUTPUT | MUX_MODE0)    /* lcd_data11.lcd_data11 */
                0xd0 (PIN_OUTPUT | MUX_MODE0)    /* lcd_data12.lcd_data12 */
                0xd4 (PIN_OUTPUT | MUX_MODE0)    /* lcd_data13.lcd_data13 */
                0xd8 (PIN_OUTPUT | MUX_MODE0)    /* lcd_data14.lcd_data14 */
                0xdc (PIN_OUTPUT | MUX_MODE0)    /* lcd_data15.lcd_data15 */
                0xe0 (PIN_OUTPUT | MUX_MODE0)    /* lcd_vsync.lcd_vsync */
                0xe4 (PIN_OUTPUT | MUX_MODE0)    /* lcd_hsync.lcd_hsync */
                0xe8 (PIN_OUTPUT | MUX_MODE0)    /* lcd_pclk.lcd_pclk */
                0xec (PIN_OUTPUT | MUX_MODE0)    /* lcd_ac_bias_en.lcd_ac_bias_en */
            >;
        };

        lcd_pins_sleep: lcd_pins_sleep {
            pinctrl-single,pins = <
                0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad8.lcd_data23 */
                0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad9.lcd_data22 */
                0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad10.lcd_data21 */
                0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad11.lcd_data20 */
                0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad12.lcd_data19 */
                0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad13.lcd_data18 */
                0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad14.lcd_data17 */
                0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad15.lcd_data16 */
                0xa0 (PULL_DISABLE | MUX_MODE7)    /* lcd_data0.lcd_data0 */
                0xa4 (PULL_DISABLE | MUX_MODE7)    /* lcd_data1.lcd_data1 */
                0xa8 (PULL_DISABLE | MUX_MODE7)    /* lcd_data2.lcd_data2 */
                0xac (PULL_DISABLE | MUX_MODE7)    /* lcd_data3.lcd_data3 */
                0xb0 (PULL_DISABLE | MUX_MODE7)    /* lcd_data4.lcd_data4 */
                0xb4 (PULL_DISABLE | MUX_MODE7)    /* lcd_data5.lcd_data5 */
                0xb8 (PULL_DISABLE | MUX_MODE7)    /* lcd_data6.lcd_data6 */
                0xbc (PULL_DISABLE | MUX_MODE7)    /* lcd_data7.lcd_data7 */
                0xc0 (PULL_DISABLE | MUX_MODE7)    /* lcd_data8.lcd_data8 */
                0xc4 (PULL_DISABLE | MUX_MODE7)    /* lcd_data9.lcd_data9 */
                0xc8 (PULL_DISABLE | MUX_MODE7)    /* lcd_data10.lcd_data10 */
                0xcc (PULL_DISABLE | MUX_MODE7)    /* lcd_data11.lcd_data11 */
                0xd0 (PULL_DISABLE | MUX_MODE7)    /* lcd_data12.lcd_data12 */
                0xd4 (PULL_DISABLE | MUX_MODE7)    /* lcd_data13.lcd_data13 */
                0xd8 (PULL_DISABLE | MUX_MODE7)    /* lcd_data14.lcd_data14 */
                0xdc (PULL_DISABLE | MUX_MODE7)    /* lcd_data15.lcd_data15 */
                0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* lcd_vsync.lcd_vsync */
                0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* lcd_hsync.lcd_hsync */
                0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* lcd_pclk.lcd_pclk */
                0xec (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* lcd_ac_bias_en.lcd_ac_bias_en */
            >;
        };


        user_leds_s0: user_leds_s0 {
            pinctrl-single,pins = <
                0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad4.gpio1_4 */
                0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad5.gpio1_5 */
                0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad6.gpio1_6 */
                0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad7.gpio1_7 */
            >;
        };

        gpio_keys_s0: gpio_keys_s0 {
            pinctrl-single,pins = <
                0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* gpmc_oen_ren.gpio2_3 */
                0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* gpmc_advn_ale.gpio2_2 */
                0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* gpmc_wait0.gpio0_30 */
                0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ben0_cle.gpio2_5 */
            >;
        };

        i2c0_pins: pinmux_i2c0_pins {
            pinctrl-single,pins = <
                0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
                0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
            >;
        };

        uart0_pins: pinmux_uart0_pins {
            pinctrl-single,pins = <
                0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
                0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)        /* uart0_txd.uart0_txd */
            >;
        };

        clkout2_pin: pinmux_clkout2_pin {
            pinctrl-single,pins = <
                0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)        /* xdma_event_intr1.clkout2 */
            >;
        };

        ecap2_pins_default: backlight_pins {
            pinctrl-single,pins = <
                0x19c 0x4    /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
            >;
        };

        ecap2_pins_sleep: ecap2_pins_sleep {
            pinctrl-single,pins = <
                0x19c (PIN_INPUT_PULLDOWN | MUX_MODE7)    /* mcasp0_ahclkr.ecap2_in_pwm2_out */
            >;
        };

        cpsw_default: cpsw_default {
            pinctrl-single,pins = <
                /* Slave 1 */
                0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_tctl */
                0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)    /* mii1_rxdv.rgmii1_rctl */
                0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd3.rgmii1_td3 */
                0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd2.rgmii1_td2 */
                0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_td1 */
                0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_td0 */
                0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rgmii1_tclk */
                0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)    /* mii1_rxclk.rgmii1_rclk */
                0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)    /* mii1_rxd3.rgmii1_rd3 */
                0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)    /* mii1_rxd2.rgmii1_rd2 */
                0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)    /* mii1_rxd1.rgmii1_rd1 */
                0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)    /* mii1_rxd0.rgmii1_rd0 */

                /* Slave 2 */
                0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a0.rgmii2_tctl */
                0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a1.rgmii2_rctl */
                0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a2.rgmii2_td3 */
                0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a3.rgmii2_td2 */
                0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a4.rgmii2_td1 */
                0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a5.rgmii2_td0 */
                0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a6.rgmii2_tclk */
                0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a7.rgmii2_rclk */
                0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a8.rgmii2_rd3 */
                0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a9.rgmii2_rd2 */
                0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a10.rgmii2_rd1 */
                0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a11.rgmii2_rd0 */
            >;
        };

        cpsw_sleep: cpsw_sleep {
            pinctrl-single,pins = <
                /* Slave 1 reset value */
                0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)

                /* Slave 2 reset value*/
                0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
            >;
        };

        davinci_mdio_default: davinci_mdio_default {
            pinctrl-single,pins = <
                /* MDIO */
                0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
                0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)            /* mdio_clk.mdio_clk */
            >;
        };

        davinci_mdio_sleep: davinci_mdio_sleep {
            pinctrl-single,pins = <
                /* MDIO reset value */
                0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
            >;
        };

        mmc1_pins_default: pinmux_mmc1_pins {
            pinctrl-single,pins = <
                0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat3.mmc0_dat3 */
                0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat2.mmc0_dat2 */
                0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat1.mmc0_dat1 */
                0x0FC (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat0.mmc0_dat0 */
                0x100 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_clk.mmc0_clk */
                0x104 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_cmd.mmc0_cmd */
                0x1A0 (PIN_INPUT_PULLUP | MUX_MODE7)    /* mcasp0_aclkr.gpio3_18 */
                0x160 (PIN_INPUT | MUX_MODE7)        /* spi0_cs1.gpio0_6 */
            >;
        };

        mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
            pinctrl-single,pins = <
                0x0F0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x0F4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x0F8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x0FC (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x1A0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
                0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7)
            >;
        };

        mcasp1_pins: mcasp1_pins {
            pinctrl-single,pins = <
                0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
                0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
                0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
                0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
            >;
        };

        mmc2_pins: pinmux_mmc2_pins {
            pinctrl-single,pins = <
                0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
                0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
                0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
                0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
                0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
                0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
                0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
            >;
        };

        wl12xx_gpio: pinmux_wl12xx_gpio {
            pinctrl-single,pins = <
                0x7c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
            >;
        };
    };

    &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pins>;

        status = "okay";
    };

    &i2c0 {
        pinctrl-names = "default";
        pinctrl-0 = <&i2c0_pins>;

        status = "okay";
        clock-frequency = <400000>;

        tps: tps@2d {
            reg = <0x2d>;
        };

        lis331dlh: lis331dlh@18 {
            compatible = "st,lis331dlh", "st,lis3lv02d";
            reg = <0x18>;
            Vdd-supply = <&lis3_reg>;
            Vdd_IO-supply = <&lis3_reg>;

            st,click-single-x;
            st,click-single-y;
            st,click-single-z;
            st,click-thresh-x = <10>;
            st,click-thresh-y = <10>;
            st,click-thresh-z = <10>;
            st,irq1-click;
            st,irq2-click;
            st,wakeup-x-lo;
            st,wakeup-x-hi;
            st,wakeup-y-lo;
            st,wakeup-y-hi;
            st,wakeup-z-lo;
            st,wakeup-z-hi;
            st,min-limit-x = <120>;
            st,min-limit-y = <120>;
            st,min-limit-z = <140>;
            st,max-limit-x = <550>;
            st,max-limit-y = <550>;
            st,max-limit-z = <750>;
        };

        tlv320aic3106: tlv320aic3106@1b {
            compatible = "ti,tlv320aic3106";
            reg = <0x1b>;
            status = "okay";

            /* Regulators */
            AVDD-supply = <&vaux2_reg>;
            IOVDD-supply = <&vaux2_reg>;
            DRVDD-supply = <&vaux2_reg>;
            DVDD-supply = <&vbat>;
        };
    };

    &usb {
        status = "okay";
    };

    &usb_ctrl_mod {
        status = "okay";
    };

    &usb0_phy {
        status = "okay";
    };

    &usb1_phy {
        status = "okay";
    };

    &usb0 {
        status = "okay";
    };

    &usb1 {
        status = "okay";
        dr_mode = "host";
    };

    &cppi41dma  {
        status = "okay";
    };

    &epwmss2 {
        status = "okay";

        ecap2: ecap@48304100 {
            status = "okay";
            pinctrl-names = "default", "sleep";
            pinctrl-0 = <&ecap2_pins_default>;
            pinctrl-1 = <&ecap2_pins_sleep>;
        };
    };

    &wkup_m3_ipc {
        ti,needs-vtt-toggle;
        ti,vtt-gpio-pin = <7>;
        ti,scale-data-fw = "am335x-evm-scale-data.bin";
    };

    #include "tps65910.dtsi"

    &tps {
        vcc1-supply = <&vbat>;
        vcc2-supply = <&vbat>;
        vcc3-supply = <&vbat>;
        vcc4-supply = <&vbat>;
        vcc5-supply = <&vbat>;
        vcc6-supply = <&vbat>;
        vcc7-supply = <&vbat>;
        vccio-supply = <&vbat>;

        regulators {
            vrtc_reg: regulator@0 {
                regulator-always-on;
            };

            vio_reg: regulator@1 {
                regulator-always-on;
            };

            vdd1_reg: regulator@2 {
                /* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
                regulator-name = "vdd_mpu";
                regulator-min-microvolt = <912500>;
                regulator-max-microvolt = <1378000>;
                regulator-boot-on;
                regulator-always-on;
            };

            vdd2_reg: regulator@3 {
                /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
                regulator-name = "vdd_core";
                regulator-min-microvolt = <912500>;
                regulator-max-microvolt = <1150000>;
                regulator-boot-on;
                regulator-always-on;
            };

            vdd3_reg: regulator@4 {
                regulator-always-on;
            };

            vdig1_reg: regulator@5 {
                regulator-always-on;
            };

            vdig2_reg: regulator@6 {
                regulator-always-on;
            };

            vpll_reg: regulator@7 {
                regulator-always-on;
            };

            vdac_reg: regulator@8 {
                regulator-always-on;
            };

            vaux1_reg: regulator@9 {
                regulator-always-on;
            };

            vaux2_reg: regulator@10 {
                regulator-always-on;
            };

            vaux33_reg: regulator@11 {
                regulator-always-on;
            };

            vmmc_reg: regulator@12 {
                regulator-min-microvolt = <1800000>;
                regulator-max-microvolt = <3300000>;
                regulator-always-on;
            };
        };
    };

    &mac {
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <&cpsw_default>;
        pinctrl-1 = <&cpsw_sleep>;
        dual_emac = <1>;
        status = "okay";
    };

    &davinci_mdio {
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <&davinci_mdio_default>;
        pinctrl-1 = <&davinci_mdio_sleep>;
        status = "okay";
    };

    &cpsw_emac0 {
        phy_id = <&davinci_mdio>, <0>;
        phy-mode = "rgmii-txid";
        dual_emac_res_vlan = <1>;
    };

    &cpsw_emac1 {
        phy_id = <&davinci_mdio>, <1>;
        phy-mode = "rgmii-txid";
        dual_emac_res_vlan = <2>;
    };

    &mmc1 {
        status = "okay";
        vmmc-supply = <&vmmc_reg>;
        bus-width = <4>;
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <&mmc1_pins_default>;
        pinctrl-1 = <&mmc1_pins_sleep>;
        cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
    };

    &sham {
        status = "okay";
    };

    &aes {
        status = "okay";
    };

    &gpio0 {
        ti,no-reset-on-init;
    };

    &mmc2 {
        status = "okay";
        vmmc-supply = <&wl12xx_vmmc>;
        ti,non-removable;
        bus-width = <4>;
        cap-power-off-card;
        keep-power-in-suspend;
        pinctrl-names = "default";
        pinctrl-0 = <&mmc2_pins>;

        #address-cells = <1>;
        #size-cells = <0>;
        wlcore: wlcore@2 {
            compatible = "ti,wl1271";
            reg = <2>;
            interrupt-parent = <&gpio0>;
            interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; /* gpio 31 */
            ref-clock-frequency = <38400000>;
        };
    };

    &mcasp1 {
            pinctrl-names = "default";
            pinctrl-0 = <&mcasp1_pins>;

            status = "okay";

            op-mode = <0>;          /* MCASP_IIS_MODE */
            tdm-slots = <2>;
            /* 4 serializers */
            serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
                0 0 1 2
            >;
            tx-num-evt = <32>;
            rx-num-evt = <32>;
    };

    &tscadc {
        status = "okay";
        tsc {
            ti,wires = <4>;
            ti,x-plate-resistance = <200>;
            ti,coordinate-readouts = <5>;
            ti,wire-config = <0x00 0x11 0x22 0x33>;
        };
    };

    &lcdc {
          status = "okay";
    };

    &sgx {
        status = "okay";
          reg = <0x8d100000 0x2000000>;
    };

    At the end of this file, the sgx section contains the line "reg = <0x8d100000 0x2000000>;". If I don't put this line, launching an opengl application fails like below:

    root@am335x-evm:~# /usr/share/qt5/examples/opengl/hellowindow/hellowindow -platform eglfs
    PVR: Hint: Setting WindowSystem to libpvrDRMWSEGL_FRONT.so

    mode for connector 20 is 2048x2040[  153.209803] tilcdc 4830e000.lcdc: failed to allocate buffer with size 16711680

    mode for CRTC of connector 20 is 2048x2040
    cannot create dumb buffer (12): Cannot allocate memory
    cannot create framebuffer for connector 20
    Could not initialize egl display
    Aborted

    If I add the mentionned line for sgx, the opengl application fails like below (the same as in my first post):

    root@am335x-evm:~# /usr/share/qt5/examples/opengl/hellowindow/hellowindow -platform eglfs
    PVR: Hint: Setting WindowSystem to libpvrDRMWSEGL_FRONT.so

    PVR:(Error): OpenServices: Cannot open device driver /dev/omapdrm_pvr. [140, /pvr_bridge_u.c]
    PVR:(Error): PVRSRVConnect: Unable to open connection. [361, /bridged_pvr_glue.c]
    Cannot initialize PVR2D contex
    Could not initialize egl display
    Aborted

    - Do you confirm the line "reg = <0x8d100000 0x2000000>;" in the dts file is correct for configuring sgx to support 2048x2040 ? (correct base address and correct size?)

    - What else need to be done for an opengl application to work with 2048x2040 ?


    Regards,

    Johann Ransay

  • You can try increasing cma memory though kernel boot args. grep for cma in kernel boot logs to know the default size.

    console=ttyO0,115200n8 quiet consoleblank=0 omapfb.debug=y drm.debug=0x3f vram=32M omapfb.vram=0:32M cma=32M root=/dev/nfs nfsroot=172.29.4.89:/export/rootfs,nolock rw ip=dhcp

  • Hi manisha,


    Thank you for your answer. cma=32M did not work, however 48M works (I guess some tripple buffering is involved somewhere). For the record, I also had to remove the reg line for sgx in the dts file (the line that I added and mentionned in a previous post).


    Thank you again, this answers my question.


    Regards,

    Johann

  • Where dis you get the setting device tree settings for sgx with reg address as 0x8d100000?
    &sgx {
    status = "okay";
    reg = <0x8d100000 0x2000000>;
    };

    I do not see that in PSDK 2.01. In PSDK 2.01 the reg address starts at 0x56000000

    Having reg address at 0x8d100000 would break sgx, as sgx driver would try to use RAM for SGX registers...
  • The device tree settings for sgx was a mistake of mine.

    I replaced that settings with:

    &sgx {
    status = "okay";
    };

    and that works.

    Do you confirm that the kernel cma setting (which default value was 24M) needs be set with respect to the resolution with this formula: width x height x 4 bytes * 3 ?

    Thanks again manisha for your help.


    Johann

  • Johann Ransay said:
    Do you confirm that the kernel cma setting (which default value was 24M) needs be set with respect to the resolution with this formula: width x height x 4 bytes * 3 ?

    Yes, that's the right formula.