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MMCSD read/write single block times.

Hi. 
I am using EVM OMAPL137 from Spectrum Digital and Sandisk 2 GB SD card. By using CSL low level, I have written MMSCD and EDMA3 functions to be used from DSP side. 
DSP is running at 300 Mhz.
I am performing single block read write tests for optimizing my code, however I believe my read /write times are too large. I will be grateful if one can reduce those times. I also wonder what are these values for using DSP BIOS / Edma3 LLD.


Below are my key settings for MMCSD Controller:
Memory Clock : 25 Mhz 
DataBus :4 bits
FifoLvl : 512 bits
Read/write endianness : Little
Dat3 detection : Disable

For writing mmcsd settings are ,

 FIFOCTL : FIFOLVL = 512 bits, ACCWD = 4 bytes , DIRECTION = WRITE.
 MMCSD cmd = DMATRIG = YES, WDATX = DATA , DATARW = WRITE , STREAM = BLOCK, WRITE_SINGLE_BLOCK

For reading ,

 FIFOCTL : FIFOLVL = 512 bits, ACCWD = 4 bytes , DIRECTION = READ.
 MMCSD cmd = DMATRIG = YES, WDATX = DATA , DATARW = READ, STREAM = BLOCK, READ_SINGLE_BLOCK


Here is EDMA3 paramset params for the transfer: 
Acnt : 4 
Bcnt : 16
Ccnt  : 8

DAM:Incr
SAM:Incr
Static field : Normal

For reading from MMCSD fifo (vice versa for writing): 
SrcBIDX : 0
SrcCIDX : 0
DstBIDX : 4
DstCIDX : 16

With these settings , transfer times are : Write  = 82 us , Read = 567 us.
Are those values acceptable /reasonable? I can not comprehend why read is taking enormous times to be finished.

If I can, I will strip out my code to be analyzed, but it seems a hard work.
Thank you in advance.

  • Hi Kaan

    As a reference, can you compare your performance data with the performance numbers listed of DSP/BIOS PSP MMCSD driver.
    The driver datasheet for the latest release is available at the following link

    http://software-dl.ti.com/dsps/dsps_public_sw/psp/BIOSPSP/01_30_01/content/OMAPL137_BIOSPSP_Datasheet.pdf

    The numbers in this datasheet are listed for bigger data size, and higher buffer sizes though.
    Hope this helps.

    Regards

    Mukul

  • Thanks Mukul.

    I will compare the performance data ASAP, as soon as I will deal with cache and silicon errata problems. Wandering the forums, I have found two interesting topics that may lead my results.   The first link is this (I also have this problem) , whereas the second one is page 6 of this one. I will play with my code and lnk.cmd, and (hopefully) come back with nice logical results.

    FYI, I am not using Edma3-LLD or MMCSD psp driver( because of project requirements and system specifications). Although I will be grateful if I could have a chance to Edma3-MMCSD interaction with interrupts used. In general, I am more than satisfied with the documentation & examples provided by TI, but I believe mmc/sd controller  lacks integrity & solid examples.  I had hard times dealing with SD specifications(dug the internet for R1,R2, cmd values etc), MMCCMD register ,(specifically DATA direction ) how to program EDMA3 paramset, DTDNE and TRDNE bits, etc.

    Regards
    Kaan