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Kernel MTD NOR Flash Support on 6467

V.Faul
Intellectual 885 points

I am currently booting off of NOR flash on 6467.  Now, I'm trying to add MTD stuff for the NOR.  There is one NOR flash chip (Spansion), which uses a 16-bit bus.  UBL says it uses the AMD command set (manufacturer ID = 0x01).  I know that the 6446 EVM uses NOR, so I copied the NOR section (CONFIG_MTD_DAVINCI_NOR) from arch/arm/mach-davinci/board-evm.c and placed it into board-dm6467-evm.c.  The flash is now defined as a platform device on the 6467.

In menuconfig, I enable the following:
"MTD support" (CONFIG_MTD)
"MTD patitioning support" (CONFIG_MTD_PARTITIONS)
"Direct char device access to MTD" (CONFIGMTD_CHAR)
"Caching block device access to MTD" (CONFIGMTD_BLOCK)
"Detect flash chips by CFI" (CONFIG_MTD_CFI)
"Support for AMD/Fujitsu flash chips" (CONFIG_MTD_CFI_AMDSTD)
"TI DaVinci board mappings" (CONFIG_MTD_DAVINCI_NOR)

When the kernel is loaded, it says that "Found no davinciflash.0 device at location zero".  I added some printk statements and found that it is not successfully finding "QRY" when sending the query command in the function cfi_probe_chip() in file drivers/mtd/chips/cfi_probe.  It is reading 0xFFFF for the query.

In the qry_present() function in file drivers/mtd/chips/cfi_probe, I think that cfi->interleave and cfi->device_type should both be 1, because the query addresses are 0x10, 0x11, and 0x12.  However, cfi->interleave and cfi->device_type are never 1 at the same time.  Can someone give me any advice?

  • 0
    TI__Expert 6385 points

    Hello,

    The first thing to verify would be that PINMUX registers have been setup correctly to access EMIFA interface.

    Thanks,

    Sekhar

  • 0 in reply to Sekhar Nori
    Intellectual 885 points

    Ah....good one.  I did a printk in cfi_probe.c on __REG(PINMUX0) and found that the 3 LSBs are 001 and according to the 6467 datasheet, they should be 000 for EMIFA.  For the benifit of others who read this, here is what I did to get bit 0 of PINMUX0 to be 0:

    Edit arch/arm/mach-davinci/mux_cfg.c, in the davinci_dm646x_pins structure change the ATAEN line to "MUX_CFG("ATAEN", 0, 0, 1, 0, 1)"

    Now the NOR flash is being recognized and partitioned as I defined in board-dm6467-evm.c

    Thanks for the help!!!!