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HyperLink boot between 2 C6657 EVMs

Michael Pocino
Prodigy 115 points

I'm trying to get one EVM to boot another via HyperLink, and having some issues.

The first EVM is booting via ROM Ethernet bootloader.  The second is booting via ROM Hyperlink boot mode (1.25 GHz).

The peripheral appears to be coming up correctly.  I can read back the remote HyperLink RX address segment value registers which agree with the default ROM bootloader mapping.

I can copy the code I intend to run on the second EVM (from local EVM's MSM RAM to the remote EVM at the 0x41000000 window), and read back the contents and verify them.

I can also copy the entry point address to the second EVM to the 0x400ffffc location, and verify its contents.

I generate an interrupt by writing 1 to the HyperLink remote interrupt pending/set register, and can see that the remote interrupt status/clear register goes from 0 to 1.

From the documentation, I would expect the second EVM to start running my code at this point, but it does not appear to be doing so.

Are any of these steps incorrect?

Is there example code for this process?

Is there anything I can inspect remotely that will give me some clues?

Thanks,

Michael

  • 0
    TI__Guru** 116170 points
    Michael,

    Your steps appear to fine to me. Just to confirm, the boot magic address where the entry point needs to populated is at 0x108ffffc and not at 0x400fffc as you have indicated. Can you confirm that is where you are populating the entry point.

    I will try to see if there is an example for hyperlink boot that we can share.

    Regards,
    Rahul
  • 0 in reply to Rahul Prabhu
    Prodigy 115 points
    Hi Rahul,

    Thanks for the quick response. On the first EVM, I am writing the entry point to 0x400ffffc, which as I understand it (and according to the RX address segment value registers) is the HyperLink window that maps to 0x108ffffc on the second EVM.

    Thanks,

    Michael
  • 0 in reply to Michael Pocino
    TI__Guru* 95265 points
    Michael,

    Do you have JTAG connection to the second C6657 EVM to verify that 0x108F_FFFC was indeed written by the _c_int00? Or your verification was done by looking at first EVM 0x400F_FFFC and 0x2180_0080 (pointing to remote side Hyperlink register) with offset 0x38 and 0x3c to understand how the EVM2 Rx side mapped?

    What register (from host side) you used to generate Hyperlink interrupt to corepac on EVM2? And if it doesn't work, where is the program counter? still in ROM or MSMC poined by your _c_int00?

    There is some Hyperlink interrupt example on e2e.ti.com/.../230138 ====> 3326.Hyperlink_EVM_example_LE.zip. Assuming the ROM code already configure the interrupt, then you need to look at the Hyperlink_IntConfig() function in the example, this is how the interrupt was generated.

    Regards, Eric
  • 0 in reply to lding
    Prodigy 115 points

    I later found my problem and thought I should update for anyone else that has this issue.  I didn't have the TXIGMASK set up correctly in the TX Address Overlay Control register.  Once I did that, things worked.

    Thanks for your help.

    Michael