TMS320C6678: IBIS parameters for DDR I/F

UNA

Part Number: TMS320C6678

Hi,

I would like to know about the output and ODT impedance setting of DDR3 I/F on C6678.

Q1: it seems that DDR3 Design Requirements for KeyStone Devices" is described the output and ODT impedance is 45ohm, but can I change these values? If so, please tell me the register information to change.

Q2: I am using the IBIS model(sprm537) for DDR3 simulation. I would like to simulate the output impedance setting with 40 ohms and the ODT setting with 50 ohms. Because the IBIS model included these parameters. If I can't change the output and ODT impedance of the C6678, please tell me why the IBIS model contains parameters other than 45 ohms.

Best regards,
H.U

over 8 years ago

0 Yordan Kovachev over 8 years ago

TI__Guru**** 161600 points

Hi,

There are the following register in the DDR3 controller:
SDRAM Configuration Register (SDCFG)
DDR_TERM [bits 26-24] => Defines termination resistor value
DYN_ODT [bits 22-21] => Dynamic On-Die Termination

in addition you have:
SDRAM Output Impedance Calibration Configuration Register (ZQCFG)

Of course your board design should strictly follow the Datasheet recommendations.

Best Regards,
Yordan

0 UNA over 8 years ago in reply to Yordan Kovachev

Mastermind 7980 points

Hi Yordan,

Thank you for your reply.

I am a beginner to use the IBIS model, please point out if my thinking is wrong.

The output impedance of keystone 1 was described as 45 ohms in the following document.

So, do I have to select CSCDVGPBFZ_FASTEST_9MA_5 PER or CSCDVGPBFZ_FAST_9MA_5PER or CSCDVGPBFZ_SLOW_9MA_5PER CSCDVGPBFZ_SLOWEST_9MA_5PER in IBIS model?

Likewise, should I choose CSCDVGPBFZ_REC_HT_TH_9MA_5PER or CSCDVGPBFZ_REC_FT_TH_9MA_5PER for the ODT impedance?

Best regards,

H.U

0 UNA over 8 years ago in reply to UNA

Mastermind 7980 points

Hi Yordan,

I need your support. I would be grateful if you get back to us as soon as possible.

Best regards,
H.U

0 Yordan Kovachev over 8 years ago in reply to UNA

TI__Guru**** 161600 points

Hi,

We're looking into this.

Best Regards,
Yordan

0 UNA over 8 years ago in reply to Yordan Kovachev

Mastermind 7980 points

Hi Yordan,

Please let me know the current status regarding this issue.

Best regards,
H.U

0 Tom Johnson 16214 over 8 years ago in reply to UNA

TI__Mastermind 46460 points

HU,

Yordan provided some information that adds confusion. The settings in the SDCFG register in C6678 are for the SDRAM. They are used to set the DDR_TERM, DYN_ODT and SDRAM_DRIVE fields in the mode registers of the SDRAM. The impedances in the PHY in the DSP are not programmable. They are the values shown in the figures referenced. The IBIS models contain a driver configuration for 9MA. This is the one that should be used for the 45-ohm driver.

Tom

0 UNA over 8 years ago in reply to Tom Johnson 16214

Mastermind 7980 points

Hi Tom,

Let me confirm if I got it.
Can I use only 9MA driver configuration? If so, why does the IBIS model include settings other than 9MA?

Best regards,
H.U

0 Bill Taboada over 8 years ago in reply to UNA

TI__Mastermind 42545 points

Hi H.U,
The IBIS model delivered from the design team is generic and doesn't include the limitations of the C6678. The IBIS model should only have the 9ma selections but the others didn't get removed. We have a open action to clean up the model but it hasn't been completed yet.
Regards,
Bill

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TMS320C6678: IBIS parameters for DDR I/F