RTOS/TMS320C6678: Choosing best Inter-Processor Communication method

ebi alinejad

Part Number: TMS320C6678

Tool/software: TI-RTOS

Hi to all

In my application i need to transfer data between core 0 and 1-7 cores (i use Linux c6x on core 0 and sys/bios on other cores , but i think my question not related to Syslink and Linux c6x)

i have 2 type of data :

1- voice data : 500 line (about 70 line per core) and each line transfer 320 byte per 20 ms but 500 lines transfer data independently (for example time difference between line x and line y may be sub 10 us ). data acknowledgment and retransmit not necessary but data loss most be lower than 5%

2- control data : 500 line (about 70 line per core) and each line transfer 10 byte per 15 second but time difference between line x and line y upper than 1 ms.data acknowledgment and re transmit is necessary for this type.

i have 3 methods :

1 - my own protocol base on shared memory and software flag and thread for polling

2 - IPC Notify

3 - IPC messageQ

at first step i'm using own protocol but i try to use IPC methods for improve performance and reliability

i have some question for choosing best method :

1- if i use Notify for voice data , can i create 500 line between cores ?

2- if i use Notify for voice data , what's happens when an ISR running on core 1 (for line y) and core 0 generate interrupt for core 1 (for line x) , nested interrupt support in IPC Notify or i need to use MessageQ ?

3- if i use messageQ for control data , can i create 500 line between cores ?

(I hope everything is clear )

thanks for your attentions

Ebi

over 8 years ago

0 Yordan Kovachev over 8 years ago

TI__Guru**** 161600 points

Hi,

I've notified the sw team. Feedback will be posted here.

Best Regards,
Yordan

0 ebi alinejad over 8 years ago in reply to Yordan Kovachev

Expert 1060 points

thanks Yordan

Ebi

0 ebi alinejad over 8 years ago in reply to Yordan Kovachev

Expert 1060 points

Hi Yordan

i'm still waiting for sw team feedback

Best Regards

Ebi

0 Garrett Ding over 8 years ago in reply to ebi alinejad

TI__Mastermind 43296 points

Hi Ebi,

MessageQ is recommended data transfer solution for inter processor (core) communication.

You cannot create 500 line between cores. As noted in the wiki, Notify APIs uses a MultiProc ID and line ID to target a specific interrupt line to/from a specific processor on a device. The line ID number is typically 0 (zero), but is provided for use on systems that have multiple interrupt lines between processors. The C6678 has 8 IPCGRx registers (IPCGR0 through IPCGR7) (i.e. lines) used by external hosts or CorePacs to generate interrupts to other CorePacs.

Regards,
Garrett

0 ebi alinejad over 8 years ago in reply to Garrett Ding

Expert 1060 points

Garrett ,

thanks for your reply and useful keyword. .i search again and try to answer my questions

ebi alinejad said:
1- if i use Notify for voice data , can i create 500 line between cores ?

you say:

Garrett Ding said:
The C6678 has 8 IPCGRx registers (IPCGR0 through IPCGR7) (i.e. lines) used by external hosts or CorePacs to generate interrupts to other CorePacs.

but according to this post c6678 have one interrupt line (lineid = 0):

and IPCGRx registers use same line to generate interrupt .
can you please confirm correct answer?

ebi alinejad said:
2- if i use Notify for voice data , what's happens when an ISR running on core 1 (for line y) and core 0 generate interrupt for core 1 (for line x) , nested interrupt support in IPC Notify or i need to use MessageQ ?

if i use Notify with 1 (or 8) line for transfer 500 independent stream between cores (sending stream identifier with payload) , when an ISR running on core 1 (for stream y) , core 0 can't interrupt for core 1 (for stream x) and stream x data loss (stream x and stream y use same interrupt line) ! (please confirm if it's correct)

thanks

Ebi

0 Garrett Ding over 8 years ago in reply to ebi alinejad

TI__Mastermind 43296 points

Hi Ebi,

I should make it clear - yes, each C66x CorePac has 8 IPCG registers, and 1 IPC_LOCAL interrupt event (#91) for inter core interrupt from any of IPCGRx registers, see Figure 7-32 TMS320C6678 System Event Inputs — C66x CorePac Primary Interrupts (Sheet 3 of 4) in data sheet.

In the case you described, it's possible stream x data will be lost. You may need custom synchronization mechanism to handle it if using Notify.

Regards,
Garrett

0 ebi alinejad over 8 years ago in reply to Garrett Ding

Expert 1060 points

Garrett,

thanks for your support!
Ebi

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RTOS/TMS320C6678: Choosing best Inter-Processor Communication method