Dear Sir,
I am using DRA74xx and running my direct display driver code in cortex M4 IPU1. Everything looks so fine except that when showing one NV12 picture (1280*720) through VID1- DSS pipeline. This picture shows last row as green line in the display.
When i filled (1280*721*1.5) data bytes, the last line changed as corrupted pixel with scattered green. With that i concluded that ,this picture has to be shown with Vertical Up-scaling by 1. From 1280*720 into 1280*721.
Is my conclusion is right? If so what are the VID1 DSS registers i have to modify. I tried changing DISPC_VID1_FIR(0x5800 10E0) register. But still the issue present
The data flow path is DSS. VID1-> HDMI ->LVDS->Display.
Please let me know what is the actual issue and how this could be resolved.
With regards,
Jeyaseelan