Tool/software: Code Composer Studio
We have a custom board using C6657 2-core processor.
I have connected JTAG via a SD XDS510 USB Plus emulator pod.
I have a simple test program, linked to run from MSMC, that configures PLL's, then runs a L2 SRAM memory test.
Every time I browse any memory, whether SRAM, or MMR space, the following immediately appears in the CC7 Console:
As you can see- this memory was the GPIO configuration MMRs. If i go back and look at the memory window, it seems to show proper values in the MMRs:
Same happens with L2 SRAM. I ran at test to program values into it. The test then Writes back from L1D, invalidates the test region, then reads back from L2 and all values match. If I browse the L2 SRAM, I immediately get the console message Error .... 0x 002/-1176 ... . But going back to the memory browser I see the proper results....
However if I Uncheck L1 Cache... (after getting more Error messages) the memory only shows ???? ????- this applies for anything in L1 or MSMC.
My link command does not specify any memory other than MSMC and L2 for any sections.
I've tried with and without the GEL executing. No difference.
Any thoughts what this is?