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66AK2H14: EMIF16 address mapping

Koichiro Tashiro
Mastermind 22945 points
Part Number: 66AK2H14

Hi,

I understood EMIF16 address mapping from below E2E thread and EMIF16 document(sprugz3a)

https://e2e.ti.com/support/processors/f/791/t/166642

For 16bit mode: EMIFA[22:0, 23]
For 8bit mode: EMIFA[21:0, 23, 22]

But customer reported that EMIFA behavior is the same for both 16bit and 8bit mode.
Customer uses ASIZE[1:0]=01b in AnCR registers.
If they access to 0x3800:0014, EMIFA[2:0, 23] = [1010].
If they access to 0x3800:0016, EMIFA[2:0, 23] = [1011].
So it seems A22 needs to be added to LSB. This is 8bit mode behavior as far as I understood.

What is the possible reason 16-bit mode works as 8-bit mode?

Thanks and regards,
Koichiro Tashiro

  • 0
    TI__Mastermind 42545 points
    Hi Koichiro-san,
    You have confused the way that an address is represented inside the K2H with the signals presented outside the part. When using a 16bit memory device, each address will present 16bits on the data bus. Inside the K2H device each byte is address separately so for half word accesses the addresses will line up as follows:
    0x3800:0000, EMIFA[2:0, 23] = [0000]
    0x3800:0002, EMIFA[2:0, 23] = [0001]
    0x3800:0004, EMIFA[2:0, 23] = [0010]
    0x3800:0006, EMIFA[2:0, 23] = [0011]

    When addressing an 8bit device, each address at the physical memory device will present 8bits on the data bus. Inside the K2H device each byte is address separately so forbyte accesses the addresses will line up as follows:

    0x3800:0000, EMIFA[1:0, 23,22] = [0000]
    0x3800:0001, EMIFA[1:0, 23,22] = [0001]
    0x3800:0002, EMIFA[1:0, 23,22] = [0010]
    0x3800:0003, EMIFA[1:0, 23,22] = [0011]

    As you can see, EMIFA0 will always represent the 32bit word boundaries, in 16bit and 8bit modes EMIFA23 will represent 16bit half word boundaries and in 8bit mode EMIFA22 will represent 8bit byte boundaries at the physical memory device.
    Regards,
    Bill
  • 0 in reply to Bill Taboada
    TI__Mastermind 22945 points
    Hi Bill,

    Sorry for my late reply. Thanks for your clarification, I understood.

    Thanks and regards,
    Koichiro Tashiro