Other Parts Discussed in Thread: DP83848C, DP83620
Tool/software: Linux
Hi Champs:
#.0 I'm using Linux SDK 5.02. with BBB.
#1. I'm working on to port the DP83825 Ethernet RMII onto the AM3352.
#2. According the E2E discussion on here:
https://e2e.ti.com/support/processors/f/791/t/243088#pi320966=1
I though there should be somewhere to config the AM335 Kernel working with RMII.
So, I grep this keyword on entire Kernel: rmii_mode, i cannot find anywhere to config it.
May you tell me where to enable the RMII mode?
#3. I gen the RMII with PinMux tool, and I have this.
myrmii1_pins_default: myrmii1_pins_default {
pinctrl-single,pins = <
0x10c ( PIN_INPUT | MUX_MODE1 ) /* (H17) gmii1_crs.rmii1_crs_dv */
0x110 ( PIN_INPUT | MUX_MODE1 ) /* (J15) gmii1_rxer.rmii1_rxer */
0x114 ( PIN_OUTPUT | MUX_MODE1 ) /* (J16) gmii1_txen.rmii1_txen */
0x128 ( PIN_OUTPUT | MUX_MODE1 ) /* (K17) gmii1_txd0.rmii1_txd0 */
0x124 ( PIN_OUTPUT | MUX_MODE1 ) /* (K16) gmii1_txd1.rmii1_txd1 */
0x140 ( PIN_INPUT | MUX_MODE1 ) /* (M16) gmii1_rxd0.rmii1_rxd0 */
0x13c ( PIN_INPUT | MUX_MODE1 ) /* (L15) gmii1_rxd1.rmii1_rxd1 */
0x144 ( PIN_INPUT | MUX_MODE0 ) /* (H18) rmii1_refclk.rmii1_refclk */
>;
};
/* Optional sleep pin settings. Must manually enter values in the below skeleton. */
myrmii1_pins_sleep: myrmii1_pins_sleep {
pinctrl-single,pins = <
0x10c ( ) /* (H17) gmii1_crs.rmii1_crs_dv */
0x110 ( ) /* (J15) gmii1_rxer.rmii1_rxer */
0x114 ( ) /* (J16) gmii1_txen.rmii1_txen */
0x128 ( ) /* (K17) gmii1_txd0.rmii1_txd0 */
0x124 ( ) /* (K16) gmii1_txd1.rmii1_txd1 */
0x140 ( ) /* (M16) gmii1_rxd0.rmii1_rxd0 */
0x13c ( ) /* (L15) gmii1_rxd1.rmii1_rxd1 */
0x144 ( ) /* (H18) rmii1_refclk.rmii1_refclk */
>;
};
Which part of the "am335x-bone-common.dtsi" I should modify?
Is this one? ==>cpsw_default: cpsw_default
and this one? ==> cpsw_sleep: cpsw_sleep
#4. What to do with those part?
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "mii";
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-mode = "mii";
};
BR Rio