66AK2G12: Bootstrap pin configuration

Mihail Musaev

Part Number: 66AK2G12

Hi,

How should I pulldown (or pullup) MAINPLL_OD_SEL and NODDR bootstrap pins? I suppose to use DDR and divide-by-2 main PLL.

I have not found information about this pins in 66AK2G12 datasheet.

Best regards,

Mihail

over 6 years ago

0 Bill Taboada over 6 years ago

TI__Mastermind 42545 points

Hi Mihail,

I'm trying to get some details on those two signals. I did review that EVM schematics and found that we were not driving those pins with any specific values at boot time. I suspect that leaving them in the default low state sufficient but I will let you know once I have more details.

Regards, Bill

0 Bill Taboada over 6 years ago in reply to Bill Taboada

TI__Mastermind 42545 points

Hi Mihail,
The NODDR bootmode pin will disable the DDR EMIF when that pin is pulled high. All accesses to the address space for DDR will be discarded.
The MAINPLL_OD_SEL should always be low. Pulling this pin high will set the output of the PLL to divide by 2. This is a test mode and should not be used.
Regards, Bill

0 Mihail Musaev over 6 years ago in reply to Bill Taboada

Prodigy 70 points

Hi, Bill
Thank you very much for the answer.
Best regards,
Mihail

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66AK2G12: Bootstrap pin configuration