Hi,
FPGA sends data to the 6678 through Direct I/O. Is there any mechanism to judge whether the data received by DSP lost or not?
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Hi,
FPGA sends data to the 6678 through Direct I/O. Is there any mechanism to judge whether the data received by DSP lost or not?
Hi Nancy,
You can check the doorbell operation of the SRIO protocol. You can also use interrupts of monitor the error conditions of the SRIO to determine if any transfer failures have occurred.
Best Regards,
Yordan
Hi,
SPn_ERR_STAT and SPx_ERR_DET registers are used to monitor error conditions, right?
Hi Nancy,
Yes, they monitor error conditions. See also this related thread:
Best Regards,
Yordan