Part Number: TMS320C6678
Tool/software: Code Composer Studio
The 6678 DSP has several Timers can be used for different usages.
We use Timer 9 as general purpose timer that generates an interrupt each 1msec.
We found that when we do some operations in the Code composer Studio (like refresh memory window, change core etc.) the timer is halt for some time and then resume counting.
According to the Timer64 application note (SPRUGV5A) , the timer has the SOFT & FREE bits in the EMUMGT_CLKSPD register which can be used to change the behavior of the timer during JTAG events.
However, according to the application note those bits are default set to 0 and are READ_ONLY, meaning that the timer will always be stopped during JTAG events.
I also tried to change those bits to '1' (meaning: "The timer runs free, regardless of the value of the SOFT bit") - the bits were change but but the timer still halts during JTAG events.
Can you explain this behavior?
The problem is critical for our design and I would glad for an answer ASAP
Thanks
