Tool/software: Code Composer Studio
Hello,
I want to send Direct I/O and Doorbell packets from xilinx FPGA to DSP (C6678) with 1.25, 2.5, 3.125, and 5 Gbps rates.
At first, I read and change SRIO_TputBenchmarking_evmc6678_C66TestProject project for my design as follow:
A) Doorbell setting:
/* Set the Doorbell route to determine which routing table is to be used
* This configuration implies that the Interrupt Routing Table is configured as
* follows:-
* Interrupt Destination 0 - INTDST 0
* Interrupt Destination 1 - INTDST 1
* Interrupt Destination 2 - INTDST 2
* Interrupt Destination 3 - INTDST 3 */
CSL_SRIO_SetDoorbellRoute (hSrio, 1);
/* Route the Doorbell interrupts.
* Doorbell Register 0 - All 16 Doorbits are routed to Interrupt Destination 0.
* Doorbell Register 1 - All 16 Doorbits are routed to Interrupt Destination 1.
* Doorbell Register 2 - All 16 Doorbits are routed to Interrupt Destination 2.
* Doorbell Register 3 - All 16 Doorbits are routed to Interrupt Destination 3. */
for (i = 0; i < 16; i++)
{
CSL_SRIO_RouteDoorbellInterrupts (hSrio, 0, i, 0);
CSL_SRIO_RouteDoorbellInterrupts (hSrio, 1, i, 1);
CSL_SRIO_RouteDoorbellInterrupts (hSrio, 2, i, 2);
CSL_SRIO_RouteDoorbellInterrupts (hSrio, 3, i, 3);
}
B) Interrupt setting for doorbell:
/* Hook up the interrupts if using interrupt mode. */
if (!srio_usePolledMode_doorbell_r)
{
/* SRIO DIO: Interrupts need to be routed from the CPINTC0 to GEM Event.
* - We have configured DIO Interrupts to get routed to Interrupt Destination 0
* (Refer to the CSL_SRIO_SetDoorbellRoute API configuration in the SRIO Initialization)
* - We want this to mapped to Host Interrupt 8
*
* Map the System Interrupt i.e. the Interrupt Destination 0 interrupt to the DIO ISR Handler. */
CpIntc_dispatchPlug(CSL_CIC0_SRIO_INTDST0, myDIOIsr_r, (UArg)hAppManagedSrioDrv_r, TRUE);
/* SRIO DIO: Configuration is for CPINTC0. We map system interrupt 112 to Host Interrupt 8. */
CpIntc_mapSysIntToHostInt(0, CSL_CIC0_SRIO_INTDST0, 8);
/* SRIO DIO: Enable the Host Interrupt. */
CpIntc_enableHostInt(0, 8);
/* SRIO DIO: Get the event id associated with the host interrupt. */
eventId_r = CpIntc_getEventId(8);
System_printf ("Debug: eventId_r is : %d\n", eventId_r);
/* SRIO DIO: Plug the CPINTC Dispatcher. */
EventCombiner_dispatchPlug (eventId_r, CpIntc_dispatch, 8, TRUE);
/* Debug Message */
System_printf ("Debug: Interrupts Registration complete. - doorbell\n");
}
C) My myDIOIsr_r function is:
void myDIOIsr_r(UArg argument)
{
uint8_t intDstDoorbell[4];
flag_loop = 1;
/* The Interrupt Destination Decode registers which need to be looked into.
* Please refer to the SRIO Device Initialization code. */
intDstDoorbell[0] = 0x0;
intDstDoorbell[1] = 0x1;
intDstDoorbell[2] = 0x2;
intDstDoorbell[3] = 0x3;
/* Pass the control to the driver DIO ISR handler. */
Srio_dioCompletionIsr ((Srio_DrvHandle)argument, intDstDoorbell);
return;
}
My problem is:
At first, I want to send only two doorbell interrupts from FPGA to DSP (both have doorbell reg 0 and doorbell bit 1). So, in DSP side, after Srio_sockOpen( ) and Srio_sockBind( ), I wrote the following code. But in FPGA side, the response of the first doorbell in ok but the response of the second doorbell is error (maybe receive side of DSP in full). Should I write Srio_sockRecv( ) function after the first "While loop" in the following code for solving the error of the second doorbell response?
while(TRUE)
{
if(flag_loop == 1)
{
break;
}
}
flag_loop = 0;
while(TRUE)
{
if(flag_loop == 1)
{
break;
}
}
flag_loop = 0;
Best Regards,
Mohammad
