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New dm6467T board won't start up (first base)

Helmut Forren
Mastermind 6805 points

Thanks very much in advance for your help.

Just got my new custom DM6467T board, based largely on the EVM (Spectrum Digital HD1080P) reference design.

Having just confirmed operation via CCS of the XDS510USB emulator on the EVM, when I move over to *my* hardware, I get an error msg in CCS.  It's the same error that I get if I simply connect the XDS510USB to *NOTHING*.  So, it seems my hardware "isn't there".  (Yes, I confirmed power and connections!)

I checked the main processor crystal (connected to DEV_MXI/DEV_CLKIN and DEV_MX0 pins).  Probing with a scope, I see no oscillation.  I am familiar from past experience that often you can NOT probe a crystal circuit with a scope and get reliable answers.

QUESTION 1: Does this crystal circuit need to be running in order for the emulator to connect to the target?

Due to low availability, this board has a TMS320DM6467ZUT7 chip in lieu of the finally desired TMS320DM6467TZUT1.

QUESTION 2: Please confirm I should be able to run with this ZUT7 chip on a board designed for the TZUT1, after appropriate changing of certain things, listed further below.

As a result, there's ambiguity about the voltage needed to run the core.  The DM6467T datasheet, which refers to the TMS320DM6467TZUT1, specifies CVdd of 1.3V (range 1.235V to 1.365V).  Meanwhile, the DM6467 datasheet, which refers to the TMS320DM6467ZUT7 (http://focus.ti.com/lit/ds/symlink/tms320dm6467.pdf) specifies CVdd of 1.2V (range 1.14V to 1.26V).

QUESTION 3: I measure 1.202V.  Should my TMS320DM6467ZUT7 be able to run?  (Other voltages 1.762V, 3.285V, 4.969V.)

I've done microprocessors for decades, but only a little stuff with PLLs, and never before with such a complicated SoC as this DaVinci chip.  I've wondered all along, when and where the PLL is actually getting configured.  Again ambiguous in the doc, I believe the TMS320DM6467ZUT7 should run at 729MHz.  I'm using a 27MHz crystal and expect the PLL to multiply that by 27 to get 729MHz.  I'm using 27MHz crystal (ABM7-27.000MHZ-D-2-Y-T) with two 18pf caps, open series resistor, 0-ohm resistor from crystal to DEV_VSS.  Note  POR_RESETn and RESETn both read 2.039V.

QUESTION 4: Should this crystal circuit start up with nothing beyond what I've documented here?  (That is, components listed above, reset voltages listed above, nothing else done to help.)

QUESTION 5: When does the PLL get programmed?  Is that done by UBL or U-Boot?  By Linux kernel?  

Datasheet section 7.7.1 implies the crystal circuit should run even while POR_RESETn and RESETn are both low.  So the logical value of my 2.039V should not matter.

QUESTION 6: Is the above true?

Now, my CPLD is still unprogrammed, and I'm trying to find out if 2.039V is considered high or low by the processor.  Datasheet table 3-8 mentions DVdd33, so I gather that these are 3.3V signals.  Looking at section 6.2, which VIH corresponds to these resets?  I think it's the first entry, which is simply 2V.  Definitely marginal.  

I'll go [try to] program my CPLD and try some more, but I'm going ahead and submitting this post because I don't think the programmed CPLD will help.

Thanks very much in advance for your help.

-Helmut

  • 0
    Mastermind 6805 points

    Helmut Forren said:

    Now, my CPLD is still unprogrammed, and I'm trying to find out if 2.039V is considered high or low by the processor.  Datasheet table 3-8 mentions DVdd33, so I gather that these are 3.3V signals.  Looking at section 6.2, which VIH corresponds to these resets?  I think it's the first entry, which is simply 2V.  Definitely marginal.  

    I'll go [try to] program my CPLD and try some more, but I'm going ahead and submitting this post because I don't think the programmed CPLD will help.

    Thanks very much in advance for your help.

    -Helmut

    Note I've programmed the CPLD now, so POR_RESETn and RESETn both measure at 3.280V, plenty to be recognized as high by the DM6467.  No improvement.

    So my first give questions earlier remain.

     

  • 0 in reply to Helmut Forren
    Mastermind 6805 points

    Please note that I've given some thought to: http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/99/p/6396/24201.aspx#24201

    My issue, on prototype board number one, is that NEITHER the core nor aux clock crystals are oscillating.  Compare to EVM circuit, page 3, found at http://support.spectrumdigital.com/boards/evmdm6467t/revc/files/Davincihd1080p_EVM_Schematics.pdf

    My circuit is the same, with exclusion of the dotted box for oscillator chip use.

    Consider the Y6 circuit, for the core.  Note R353, not populated.  If I probe the crystal circuit side of this with my scope, I see no oscillation.  If I *also* probe the remote side, I suddenly get oscillation on both probes.  if I remove the probe from the crystal circuit side, the oscillation continues.  Therefore, the single act of adding the probe to the remote side causes the crystal circuit to start oscillating.  This is NOT a direct connection to the crystal circuit, but only indirect through possible parasitics.

    The EXACT SAME thing occurs for the aux crystal circuit, around Y5.  Interesting.

    Note the reference design uses two 18pf crystals.  While I've been doing crystal circuits for 20+ years, perhaps I've forgotten half as much as I've ever learned!  (single person development team)  Also, it's *always* been two 18 pF crystals.  So, double checking myself, however, the DM6467 datasheet points out that the load created by these two caps is only 9pF.  (Hmmm... they seem in parallel to ground, but half the capacitance is by putting them in series, unlike resistors, remember).  Perhaps I've always had plenty of parasitic capacitance, but not this time?  I especially wonder about this when reading the post, a like to which opened this reply right here.

    These are unbelievably little 0402 surface mount.  I piggybacked a 15pF 0805 on top of each, with no change in failure or probe-touch-success.  This should have converted each 18pF cap to 33pF, and then the two assemblies [in series] make 16.5pF.  Still, the spec is 18pF.  But don't I have at least 1.5pF of parasitic capacitance?

    I changed one piggyback from 15pF to 22pF.  This nets to 18.08pF load.  Still no joy.  Probing remote no-pop pad still gets it going.

    I'll order an 0402 cap kit, but in the mean time I'm thinking the problem is not load capacitance.

    Rather than holding my errors close to my vest, I'll go ahead and put this out there.  After all, even experts make mistakes and overlook things.

    Any suggestions?

  • 0 in reply to Helmut Forren
    TI__Expert 8260 points

    Helmut,

    You posted multiple questions in the first post. Before looking at them, you need to fix following two things first:

    1> Crystal oscillation issue.

    2> JTAG connection issue.

    I will check with crystal guy and get back to you if he has any comments.

    By the way, are u using the same 27MHz crystal as on DM6467 (not DM6467T) EVM? If not, please post the data sheet of the crytstal you are using.

    Regards, Srirami.

  • 0 in reply to srirami
    Mastermind 6805 points

    Hello again, Srirami.

    Sorry, I saw all the questions as related and possibly germane, which is why I posted them together.

    Regarding the JTAG connection issue, I can reduce that to a question of, is it due to crystal not oscillating, or should JTAG still connect nevertheless?

    Regarding crystal... WOAH! STOP THE PRESSES...  I had gone through the DM6467 to DM6467T migration doc, and anything other than crystal freq didn't come to my attention.  I don't find a DM6467 (no T) evm at all, but I do find in the datasheet a note about C1=C2=10pF versus the DM6467T table with C1,C2,12-20pF.   Maybe the DM6467 (no T) has a wad of [parasitic] capacitance inside.

    Your point implies to me that I may need to go down in capacitance, not up.  Regarding the crystal itself, I don't find sufficient info to differentiate, finding no evm.  Do you know a link to a DM6467 (no T) evm?

    My crystal is http://www.abracon.com/Resonators/abm7.pdf 
    DM6467T evm crystal is http://www.citizencrystal.com/images/pdf/m-cs10.pdf 
    DM6467 evm crystal is unknown to me
    DM6446 evm crystal is I believe same as DM6467T evm, so surely is also DM6467 evm 
    YEAH, BUT...  dm6446evm uses 18pF caps, like DM6467T evm.  Yet dm6446 datasheet also says C1=C2=10pF.  So I'm lost.  Just gotta play around with caps... 

    Srirarmi, I have 0402 capacitor kit coming for Sat AM delivery.  I'll first go down rather than up in capacitance.  Thanks for leading me to this.

    P.S. http://support.spectrumdigital.com/boards/evmdm6467/revf/ links to schematic and BOM are bad.

  • 0 in reply to Helmut Forren
    TI__Expert 8260 points

    Helmut,

    Please try going down the capacitance. Try C1=C2=12pF, if you have one.

    Here is the link to the DM6467 EVM. But links are not working. I will ping Spectrum on this. For the time being, I am attaching the schematic here.

    http://support.spectrumdigital.com/boards/evmdm6467/revf/

    18pF is used on DM6467 EVM also because it was designed even before data sheet was released. Looks like Spectrum missed to update it in later versions. Try to lower capacitance on your board and see if it makes any difference.

    Regards, Srirami.

     

    DM6467_EVM_Schematics_RevF.pdf
  • 0 in reply to Helmut Forren
    Mastermind 6805 points

    RESOLVED.  Footprint for EMI filter (NFM18CC223R1C3) had input and ground reversed, such that CPU was not getting DEV_DVdd18 or three others.  Fortunately, local routing all on top and in parallel, so two board cuts and two jumpers fixed wiring on four filters.  Suddenly main PS current now 0.15A instead of 0.11A (good sign...).  Both cpu and aux oscillators now oscillating.

    BTW, each running right now with 15pF.  Didn't have any 18pF caps in my kit.  Anyway, this is at least a little movement toward Srirami's recommendation of 12pF, and not too far from my other boards' 18pF.  So other boards ought to work after getting similar cuts/jumpers.

  • 0 in reply to Helmut Forren
    TI__Expert 8260 points

    Helmut,

    Good to hear about fixing oscillation issue. Are you able to connect JTAG now? If you have any, repost your questions depending on your latest testing & debug?

    Regards, Srirami.

  • 0 in reply to srirami
    Mastermind 6805 points

    Thx, Srirami.  While the osc works, I still can't connect with JTAG.  Doing some research on that today.  Look for a NEW thread later today, solved or not.