TDA4VM: PC_dsp_test_dl_algo.out doesnt print Layer Cycles correctly

Ayman Khalaf1

Part Number: TDA4VM

I have managed to import a model and run it on Jacinto7 but it is very slow. I want to see the time taken by each layer in the model to see where can I improve the performance however Layer Cycles always print zeros. I tested it on the pre-trained jacintonet11v2 model but it also prints zeros.

result of running PC_dsp_test_dl_algo.out :

Processing config file #0 : testvecs/config/infer/public/caffe/tidl_infer_jacintonet11v2.txt

Instance created for testvecs/config/infer/public/caffe/tidl_infer_jacintonet11v2.txt
----------------------- TIDL Process with REF_ONLY FLOW ------------------------

# 0 . .. 0 1.00000 0.00000 255.00000 0
1 32.95223 0.00000 5.89490 0
2 23.05354 0.00000 6.62588 0
3 23.05354 0.00000 6.62588 0
4 53.92548 0.00000 3.03660 0
5 37.13324 0.00000 3.65239 0
6 37.13324 0.00000 3.65239 0
7 75.10606 0.00000 2.65291 0
8 77.80582 0.00000 3.00427 0
9 77.80582 0.00000 3.00427 0
10 107.21455 0.00000 2.14057 0
11 109.49833 0.00000 2.18496 0
12 109.49833 0.00000 2.18496 0
13 239.15154 0.00000 0.98369 0
14 9.85123 0.00000 21.46940 0
15 19.70246 0.00000 6.62354 0
16 5.87285 -8.04549 12.04695 1
17 1.00000 0.00000 0.49358 6

Processing config file #1 : testvecs/config/infer/public/onnx/tidl_infer_manual.txt
----------------------- TIDL Process with REF_ONLY FLOW ------------------------

Network Cycles 0
Layer, Layer Cycles,kernelOnlyCycles, coreLoopCycles,LayerSetupCycles,dmaPipeupCycles, dmaPipeDownCycles, PrefetchCycles,copyKerCoeffCycles,LayerDeinitCycles,LastBlockCycles, paddingTrigger, paddingWait,LayerWithoutPad,LayerHandleCopy, BackupCycles, RestoreCycles,
1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
29, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
31, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
33, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
35, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
36, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
37, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
38, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
39, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
40, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
41, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
43, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
44, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
45, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
46, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
47, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
49, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
50, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
51, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
52, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
53, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
54, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
55, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
56, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
Sum of Layer Cycles 0

-----------------

content of file tidl_infer_jacintonet11v2.txt

inFileFormat = 2
postProcType = 1
numFrames = 1
netBinFile = "testvecs/config/tidl_models/caffe/tidl_net_jacintonet11v2.bin"
ioConfigFile = "testvecs/config/tidl_models/caffe/tidl_io_jacintonet11v2_1.bin"
outData = "testvecs/output/airshow_j11.bin"
inData = testvecs/config/classification_list.txt
debugTraceLevel = 1
writeTraceLevel = 1
writeBinsAsHeader = 0
enableLayerPerfTraces = 1

--------------------

how can I configure it to get correct information about Layer Cycles?

Regards

over 4 years ago

0 Anshu Jain over 4 years ago

TI__Guru 56820 points

Hi,

The layer level performance traces is only applicable for EVM run not for PC emulation that's why you see all zero's. Please refer the following to understand how to enable layer level traces :

You can follow the following step to understand how to run on EVM (Steps to run Sample Application on EVM) :

software-dl.ti.com/.../md_tidl_sample_test.html

Regards,

Anshu

0 Ayman Khalaf1 over 4 years ago in reply to Anshu Jain

Prodigy 230 points

I tested it on EVM, put it didn't print anything

content of tidl_infer_manual.txt

inFileFormat = 2
postProcType = 0
numFrames = 3
netBinFile = "testvecs/config/tidl_models/onnx/tidl_net_manual.bin"
ioConfigFile = "testvecs/config/tidl_models/onnx/tidl_io_manual_1.bin"
inData = testvecs/config/manual_sample_val.txt
outData = testvecs/output/minimap_onnx_manual.bin
enableLayerPerfTraces = 1
debugTraceLevel = 0
writeTraceLevel = 0
writeOutput = 2

-------------------------------------

output:

./TI_DEVICE_a72_test_dl_algo_host_rt.out
APP: Init ... !!!
MEM: Init ... !!!
MEM: Initialized DMA HEAP (fd=4) !!!
MEM: Init ... Done !!!
IPC: Init ... !!!
IPC: Init ... Done !!!
REMOTE_SERVICE: Init ... !!!
REMOTE_SERVICE: Init ... Done !!!
APP: Init ... Done !!!
972.998574 s: VX_ZONE_INIT:Enabled
972.998606 s: VX_ZONE_ERROR:Enabled
972.998611 s: VX_ZONE_WARNING:Enabled
972.999137 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!!
972.999371 s: VX_ZONE_INIT:[tivxHostInit:48] Initialization Done for HOST !!!
Processing config file #0 : testvecs/config/infer/public/onnx/tidl_infer_manual.txt
----------------------- TIDL Process with TARGET DATA FLOW ------------------------
# 0 . .. TSC Mega Cycles = 141.98 ... .... .....
----------------------- TIDL Process with TARGET DATA FLOW ------------------------
# 0 . .. TSC Mega Cycles = 140.54 ... .... .....
----------------------- TIDL Process with TARGET DATA FLOW ------------------------
# 0 . .. TSC Mega Cycles = 140.52 ... .... .....

0 Anshu Jain over 4 years ago in reply to Ayman Khalaf1

TI__Guru 56820 points

Hi,

Can you confirm if you have done following two things as mentioned in the documents shared:

software-dl.ti.com/.../md_tidl_sample_test.html

root@ j7-evm:~# cd /opt/vision_apps
root@ j7-evm:~# source ./vision_apps_init.sh

and setting in infer config file:
debugTraceLevel = 1

Regards,

Anshu

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TDA4VM: PC_dsp_test_dl_algo.out doesnt print Layer Cycles correctly