Hi,
Is it possible to change the interrupt cycle for completing DMA reception to less than 1ms?
Or can this be achieved by not using DMA?
The purpose is to send the response data within 1ms to the data received from RS-485.
But, at present, this cannot be achieved because the interrupt function for completing DMA reception (Linux UART driver: __dma_rx_do_complete()) is called at a cycle of about 6 ms.
Below, as described in "19.3.6.1.2 Receive FIFO Trigger" of the "Technical Reference Manual",
although it has been changed to 1 character, the interrupt function for completing DMA reception is called at a cycle of about 6ms.
Also, when DMA is disabled ("CONFIG_SERIAL_8250_DMA" is disabled in menu config), the interrupt function for completing DMA reception (serial8250_handle_irq()) is called at a cycle of about 4.7ms.
---
[Processor]: AM3354BZCZA60
[target boad]: Custom board created by us
[SDK Version]: Processor SDK Linux（06_01_00_08）
※URL: software-dl.ti.com/.../Overview_Building_the_SDK.html
[uart baudrate]: 187500 bps
[uart driver]: 8250_omap
[Interrupt function for DMA reception completion]: __dma_rx_do_complete()、serial8250_handle_irq()
[RS-485 comunication]: switch half duplex and full duplex on boot
[Technical Reference Manual]:
※URL: www.ti.com/.../spruh73q.pdf
19.3.6.1.2 Receive FIFO Trigger
※1 character (UART_SCR[7]=1、UART_TLR[7:4]=0、RX FIFO Trigger Level=1)
19.3.6.2 FIFO Interrupt Mode
19.4.1.1.2 FIFOs and DMA Settings
19.5.1.11 FCR Register
19.5.1.24 TLR Register
19.5.1.39 SCR Register
---
