• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 99 subscribers
  • Views 3242 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

OCMC RAM

Wim De Witte
Intellectual 300 points

Hi All,

I wan't to access the internal SRAM. The bootcounter of u-boot is stored in here and must be resetted from linux.

I mapped the physical SRAM address (0x4030B800 - 4) and enabled the clock (ocmcram_ick).

On address 0x4030B800 a validation magic (0xB001C041) is written by u-boot.

On both addresses a zero is read.

Any clue?

Wim De Witte

  • 0
    TI__Expert 3020 points

    Hello Wim,

    I can read (and write) 0x4030B7FC and 0x4030B800, but I read zeros too.

    Are you using the u-boot from the SDK?

    In the u-boot git repo a new bootcounter mechanism has replace the old one. I'll have to look up where the addresses are defined, haven't found them yet.

    Regards,

    Lo

  • 0 in reply to Lo
    Intellectual 300 points

    Hi Lo,

    forgot to say that the bootcounter functionality was added with a patch. Cannot find a new mechanism in the git.

    Found another solution. In stead of using the RAM to hold the bootcounter, I can use the RTC scratch registers,

    which retain contents after reset. (0x44e3e060    /* RTC_SCRATCH0_REG */) (the rtc driver is not using these registers)

    Regards,

    Wim