How to adjust clk frequency in RDK use case?

Hi everyone,

Our case is in 8148.  Original clk is as follows:

ARM clk: 720MHz, DDR clk: 400MHz, IVA clk: 410MHz, ISS clk: 480MHz, DSS clk: 200MHz, DSP clk: 750MHz 

If swMsPrm.layoutPrm.outputFPS       = 30;

the actual swMs output framerate is 30.

Now we adjust clk as follows:

ARM clk: 1000MHz
DDR clk: 533MHz
L3 clk: 220MHz
HDVPSS clk: 220MHz
HDVICP clk: 450MHz
ISS clk: 560MHz
DSP clk: 750MHz

    Then found if swMsPrm.layoutPrm.outputFPS       = 30;

actual swMs framerate is larger than 30. (I means (total output frames)/(total processed time) )

So, is there anything we must change in the RDK code?

We found in /mcfw/interfaces/link_api/system_common.h

#define SYSTEM_M3VPSS_FREQ         (240*1000*1000)
#define SYSTEM_M3VIDEO_FREQ        (240*1000*1000)
#define SYSTEM_DSP_FREQ            (750*1000*1000)

But had no idea how to adjust them.  Or there are others must be changed? 

Could anyone can tell me how to adjust?

Thank you very much.

Sincerely,

James