Booting with the C6748 using AISgen

ReinierC

Other Parts Discussed in Thread: OMAP-L138, OMAPL138

Hi guys,

I'm using the C6748 SOM on the Zoom Development Kit from LogicPD for developing a DSP/BIOS 5.41 application. I'm also using the BIOSPSP drivers (v1.30.01) for the C6748. I have completed the project up to a point where we now want to make a bootable release version of it, i.e. for development I've been using CCS 5.2 with a GEL file.

After some investigation we found that the best route for booting will be through the AISgen and flasher utilities from TI. In general these utilities are quite intuitive, but I feel the documentation is still lacking a little bit, especially if you have no prior experience (as in my case) with bootloaders. I therefore just have a few questions, which I hope the experts could answer for me:

- AISgen allows you to configure the PLL, SDRAM, PSC, DDR and Pinmux through the various associated registers. How exactly are these configurations used? Are these configurations only used by the flasher utility to properly write my application to flash or is it the idea to perform the configuration the GEL file would normally do in a debug environment with an emulator?

- How do I determine the proper DDR register values to be configured in AISgen? What I intend to do is just run the working application, halt the processor and read the values from the registers through the memory browser in CCS 5.2. Is there a better way to do this?

- What are all the configurations I now have to do in my actual code, which was previously done through the GEL file? In my case the GEL file configured PLL0, PPL1, DDR, PINMUX and turned on the various PSC modules. Do I now instead have to perform all of these configurations in my application code?

- I will be booting from NAND flash and at the moment we will not be using the NAND flash for anything else. Is it therfore necessary for my actual application to have any EMIF NAND drivers or perform any NAND related configuration?

Your insights would be greatly appreciated!

Regards

Reinier

over 12 years ago

0 David Friedland over 12 years ago

TI__Mastermind 18320 points

Reinier,

This is more of a generic device question rather than one specific to BIOS. I have moved this thread over to the relevant device forum so that it will get a faster response.

Dave

0 ReinierC over 12 years ago in reply to David Friedland

Expert 2425 points

Thank you Dave, I'm looking forward a response there.

0 Rahul Prabhu over 12 years ago

TI__Guru** 115880 points

Hi Reiner,

Thanks for the feedback. We will try to incorporate your questions into the documentation if they are not already in it. The documentation for the bootloader is provided in the Bootloader application notes that are provided on the product folder as well as helpful wiki articles on processors.ti.com. Please refer to the article below for finding more details:

http://processors.wiki.ti.com/index.php/OMAP-L138_Software_Design_Guide#Understanding_how_the_OMAP-L138_Boot_Sequence_Works

->If you have refered to the bootloader App note, it describes how the AIS formatted boot images work. All the device configuration that you provide through the AISGen tool GUI get translated into function execute AIS command that will be interpretted by the ROM boot loader to setup and initialize the device. When you select the boot mode in the AISGen GUI, the configuration for the boot media is done by default. This PLL, DDR ,PinMUX and PSC configuration is similar to the configuration the GEL file does in the normal debug environment but in addition to that it can also do boot media configurations

->DDR register values to use in AISGen, depend on several factors like timing and cache latency specs of the DDR memory chip datasheet, EMIFB clock settings, etc. If you already have a GEL file for the debug environment, you simply need to find the value of SDCFG, SDTIMR SDSRETR, SDRCR registers and provide them to the utility.

->Most GEL file configurations can be done during the boot process by configuring the AISGen utility appropriately. PLL,PSC, SDRAM, PINMUX, PSC can all be done using the boot loader so this doesn`t have to be done in code. What you have in mind for configuring the device is actually a very good idea. Also keep in mind that you are using BIOS PSP so a lot of the PSC configuration will be done by the drivers.

->Unless you are not able to use the serial flash utility or the NAND Writer that we provide, there is no need for any EMIF NAND drivers for you to program.

Please let me know, if there are any follow up questions.

Regards,

Rahul

0 ReinierC over 12 years ago in reply to Rahul Prabhu

Expert 2425 points

Hi Rahul,

Thank you for your insights, its much appreciated.

My main configuration concern is that of the DDR and to a lesser extend PLL0/1. I see in the GEL file that DDR configuration is quite a process and also includes some calibration. Would there not be possible issues with the DDR if the register values are just simply programmed through AISgen, as opposed to going through the complete configuration process?

To check how the flasher utility works I tried to boot the simple LED flashing app from the link you provided. I noticed that nothing happend after flashing the boot image, but I finally got it to work by specifying the app start address with the -appStartAddr flag. From the link you provided it appears to be necessary to create an entry point in memory for the application. Since I'm using DSP/BIOS, I therefore have to specify the location of c_init00, according to this link:

http://processors.wiki.ti.com/index.php/Accessing_c_int00

Can I place c_init00 in DDR and then alter the starting address and length of the DDR (in the TCF script) or does it have be placed in internal RAM? What is a reasonable address/location to place c_init00 on the C6748? Is there anything else I have to take into consideration?

0 Rahul Prabhu over 12 years ago in reply to ReinierC

TI__Guru** 115880 points

The EMIFB clock settings and SDRAM configuration and timing setup is sufficient for the bootloader to configure the DDR. We have no known issue with the tool where there have been issues in configuring the DDR.

Seems like you used the command line utility rather than the GUI based tool while creating the boot image. I will need to confirm if this is required on the command line utility. If you look at the instructions provided on the wiki and load the configuration file you will notice that a specific entry point is not provided to the GUI tool as there is a mechanism by which the tool figures location of cint00.

You can put your entry point in external memory but try to keep it aligned to 1Kb boundary as explained by that example.

Regards,

Rahul

0 ReinierC over 12 years ago in reply to Rahul Prabhu

Expert 2425 points

Rahul,

I managed to boot my application without specifying the starting address. I'm not sure what I did wrong with the sample application, though. Just for completeness, this is what I did:

1) Created a specific section in my DDR to be used by .sysinit, using this code in the TCF script:

bios.MEM.create("RAM4CINT00");
bios.MEM.instance("RAM4CINT00").base = 0xC0000000;
bios.MEM.instance("RAM4CINT00").len = 0x00008000;
bios.MEM.instance("RAM4CINT00").createHeap = 0;
bios.MEM.instance("RAM4CINT00").space = "code";

bios.MEM.SYSINITSEG = prog.get("RAM4CINT00");

This will put .sysinit in a fixed location in memory. Just remember to adjust the DDR base and len accordingly so that they do not overlap.

2) I used the AISgen configuration found from the link below:

http://processors.wiki.ti.com/index.php/OMAP-L138_Bootloader

As it turned out, its only necessary to configure the flash, PLL0, PLL1 and DDR from AISgen. My code configures the PSC modules as well as the Pinmux. AISgen the generated the .bin file.

3) I used the SFH flasher utility to write the boot image to NAND flash, using the following command line call:

sfh_OMAP-L138 -flash_noubl -targetType C6748 -flashType NAND -p COM4 test_app.bin

Ensure that the boot pins are configured for UART when power cycling. When the flashing has finished, switch the boot pins to NAND boot and power cycle, which will then boot the app from flash.

This brings me to my next question: our app is quite big and complex, so consequently it takes about 30 seconds to boot, which is too long. I suspect I can significantly speed up the booting process if the bootloader could also configure the cache. However, I can't see that this is possible with AISgen utility. Is there some other way that I can decrease the boot time?

Regards

Reinier

0 Rahul Prabhu over 12 years ago in reply to ReinierC

TI__Guru** 115880 points

Reiner,

Here are some boot benchmarks that we computed using the OMAPL138 EVM:

http://processors.wiki.ti.com/index.php/OMAP-L138_Boot_Benchmarks

As you can see from the wiki booting from NOR or SPI flash is among the faster boot modes. Looks like you are booting from NAND flash. The boot loader while Booting from NAND flash also does Error checks and corrections(ECC) which can`t be disabled.

Here are some ways that I can think of to make the boot process faster:

1. Disable CRC check (May compromise of the error detection)

2. Increase SPI speeds.

3. Use a user boot loader(UBL) to create the AIS image that only setups the device to load the application(in hex format not in AIS format) from alternate faster media.

How big is your application image?

Regards,

Rahul

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Booting with the C6748 using AISgen