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DM6467 Nand Boot Failure Issue

Hi

We are using DM6467 in our custom design and we are using Micron Nand Flash to boot it. It was working properly and now suddenly we are seeing that the board is not able to boot up. We always see the "BOOTME" print at the UART terminal. 

We have gone through the DM6467 booloader document and based on that we have a few queries. 

1. On page 9 of this document it is mentioned that

               “The NAND RBL uses the hardware error detection capability and checksums embedded within the NAND to determine if a read error occurs when reading the            UBL. If a read error occurs, the UBL immediately halts the copy from NAND, and the RBL continues to search the block following that block in which the magic number was found for another instance of a magic number. When a magic number is found, the process is repeated. Using this retry process, the magic number and UBL can be duplicated up to five times, giving significant redundancy and error resilience to NAND read errors.”

 We find this paragraph ambiguous.  It says that the RBL uses hardware error detection capability and checksums embedded within the NAND to detect a read error when reading the UBL. Does that mean it does not use the internal DM6467 ECC but the NAND ECC. In that case how does the RBL behave when the internal ECC is disabled. Also it states that “ when a read error occurs , the UBL immediately halts the copy from NAND”. We believe there is some error in this statement. It will be better if someone can give us more clarification on the above paragraph.

 2.  Also it is mentioned that the RBL searches for UBL descriptors at Page 0 from Block 1 to Block 5. If it does not get any valid Boot signature in a Block, then it goes to   the next block and searches for the valid boot signature. This continues till Block 5 and then it reverts back to UART boot mode. We would like you to share more information on how the RBL reads the UBL descriptors from Block 1 to Block 5. We understand there are 2 ways to do it.

              a. The RBL reads the UBL descriptors and ignores the ECC and then compares it with the valid boot signature.

              b. The RBL reads the UBL descriptors and then uses ECC detection and correction to correct any errors and then compare it with the valid boot signature.

     We would like to know which of the above scheme is followed in RBL.

 3. We would like to know whether the RBL of DM6467 uses ECC by default? And if yes, how many bits ECC?

Regards

Ayusman

  • Hi

    This is a very critical issue. Can anyone reply?

     

    Regards

    Ayusman

     

     

  • Ayushman,

    1. RBL always uses the hardware ECC generator block for calculating ECC. I am not sure about the document that you referred. 

    2. AFAIK, RBL doesn't ignore ECC while reading the UBL descriptors. Statement b is correct.

    3. RBL uses ECC. I'm not sure about the algorithm used in DM6467. But what I've seen in similar Davinci platforms is 4-bit ECC algorithm being used.