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DDR3 Address line signal of AM3874

Michi Yama
Guru 10030 points
Other Parts Discussed in Thread: AM3874

Hi,

I have questions regarding Address line signal (A2) of AM3874.

Please see the below waveform.

As you see from the magnified waveform,  The voltage level of Address line is changed when address line is not drvied by DDR3 controller.

Is this behavior normal action as DDR3 controller? Also you see Address line seems to be not full swing. This is also strange.

And also you see from the left side waveform, VIL =600mV. DDR3 Vref is 0.75V. So this means it is no margin.

How do you think about this?

Please advise me.

Best regards,

Michi