C6748 Power Domain transition problem

Hi Jiri,

What board are you using ?

TI C6748 LCDK , LogicPD EVM or custom ?

PSC1 Enable Transition Timeout on Domain 0, LPSC 0
PSC1 Enable Verify Timeout on Domain 0, LPSC 0

When you are getting this warning message ?

While loading gel file or loading .out into DSP core ?

1. I write 3 to the field NEXT of appropriate PSC1 Module Control n Register (MDCTLn).

2. I set the bit GO[0] from PSC1 Power Domain Transition Command Register (PTCMD).

3. The field STATE of PSC1 Module Status n Register (MDSTATn) is changed from 0 to 0x18 (whole value of MDSTAT is 0x1E18), the bit GOSTAT[0] from PSC1 Power Domain Transition Status Register (PTSTAT) is changed to 1. I read the registers repeatedly and the values ar not changing. This means that the module status is stuck in transition.

Did you write any code to do this stuff ?

What kind of code are you running ?

Starterware or CSL or 'C' ?

What exactly does the value of 0x18 of STATE field of MDSTAT mean?

4h-3F -> Indicates the transition (transition is in progress)

Hi Jiri,

Jiri said:

I am able to connect to target using JTAG successfuly. I can read and write the memory mapped registers. But when I was trying to load the program into C6748 I got following error message:

What is the program you are trying to load? Is it a TI supplied program or your own? What is the gel file you used for this experiment? By any chance you modifed the GEL?

To narrow down the problem, first, try to load a sample starterware example program supplied by TI which should  straight away work on C6748 LCDKs. By the way, is it you custom board or TI LCDK/EVM boards?

Regards,

Shankari

-------------------------------------------------------------------------------------------------------

Please click the Verify Answer button on this post if it answers your question.
--------------------------------------------------------------------------------------------------------

I am using custom board. It is a new design. But we have another custom board where the part of scheme with DSP and peripherals is the same and it works well.

I get the warning messages 'PSC1 Enable Transition Timeout on Domain 0, LPSC x' when I connect DSP in CCS 5.5 and run the OnTargetConnect() script from C6748_LCDK.gel.

I am not running any code to read and write the PSC1 registers. In fact I am not able to load the programm into DSP. I am powering on the board only and connecting DSP using XDS100v2 and CCS. I am not running any script from GEL file. And I am reading and writing the PSC1 registers using Registers View in CCS.

I know that codes 0x04 - 0x3F of STATE field of MDSTAT indicates the transition. I would like to know what exactly does the code 0x18 mean because I hope it could help to solve my problem...

Thank you.

Jiri

Hello,

I tried to increase the voltage supply CVDD from 1.2 to 1.3 V and it partially helps. Now it is possible to enable all modules from power domains. But setting of PLL0 does not work. If I run the script Set_Core_300MHz() the DSP stops responding to requests. From that moment I am not able to read registers using JTAG. I tried Set_Core_100MHz() too. The result is the same. The 24 MHz crystal works well.

Do you have any idea what is wrong? And why is needed the higher voltage supply?

The device designation is TMS320C6748BZWT4.

Best regards,

Jiri

Hi Jiri,

We were glad that you got working.

Thanks for your update.