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ARM Clock rate "AM437x IDK"

Other Parts Discussed in Thread: SYSBIOS

i need to change cpu clock rate from 600 Mhz to 1000 Mhz ? can help me to solve this issue ?

  • Hi,

    I will forward this to the Industrial SDK team.

  • Hi,
    I see nobody responded to that post - can you please forward this question once again to SDK team?
    Thanks,
    JJ
  • JJ,

    You can look at ccsv6\ccs_base\emulation\boards\idk_am437x\gel\ function MPU_PLL_Config() to change the MPU from 600MHz to 1000MHz.

    Regards, Eric

  • Hi Eric,
    Thanks - it looks to change all the essential PLL registers.
    Do I have to change the clock frequency also in *.cfg file for Sysbios?
    Thanks,
    JJ
  • JJ,

    In the .cfg file, there is something like BIOS.cpuFreq.lo = 600000000;====> This has to be changed to the real CPU speed as well. Note, the updating this number doesn't changing any PLL setting, the real CPU speed is programed by GEL file or code, but this number tells SYSBIOS what the CPU speed is and SYSBIOS calculates the timer clock based on it. The mismatch between real CPU speed and this setting makes the SYSBIOS timer inaccurate.

    Regards, Eric

  • Hi,

    Ok- now everything is clear.

    Thank you Eric

    JJ

  • that great respond thanks, but i have deeply question.

    "\ccsv6\ccs_base\emulation\boards\idk_am437x\gel\" in this path has multiple gel files two of them are AM437x_PLLconfig.gel and AM43xx_PLLconfig.gel and when startup system it uses AM43xx_PLLconfig.gel and this file contains some PLL functions to conf. the cpu clock like

    MPU_PLL_Config(  CLKIN, 0, 25, 1);    //600MHz

    what are input parameters have to pass to this function to get 1000MHZ  ?
    hint : CLKIN = 24MHZ

    thanks in advance,

  • MPU_PLL_Config( CLKIN, 2, 125, 1); //1000MHz

    Regards, Eric
  • when i used MPU_PLL_Config( CLKIN, 2, 125, 1); //1000MHz
    then i used this function to get cpu freq. "unsigned int UTILsGetArmClockRate();" that get 3000 MHZ in case of 1000 MHZ and get 600 in case of 600 .. any suggestion ?

    thanks,
  • The suggested number for PLL configuration comes from MPU_PLL = CLKIN*MULTI/(DIVIDER+1)/POSTDIVIDER

    So, for 600MHz: 0, 25, 1, it comes from 24*25/(0+1)/1= 600
    For 1000MHz: 2, 125,1, it comes from 24*125/(2+1)/1=1000

    unsigned int UTILsGetArmClockRate() reports 3000MHz, where is this function? I want to see how it is implemented, I didn't find it under pdk_am437x_1_0_2 folder?

    Regards, Eric
  • this function located at "am437x_sysbios_ind_sdk_2.0.0.2\sdk\os_drivers\source\osdrv_utile.c"

    and this is an implementation :

    unsigned int UTILsGetArmClockRate()
    {
    //Return ARM frequency
    unsigned int clkin;
    unsigned int divider = *((unsigned int*) (SOC_CM_WKUP_REG + PRCM_CM_CLKSEL_DPLL_MPU));
    divider = (divider >> 8 ) & 0x3FF;
    unsigned osclk_freq = *((unsigned int*)(SOC_CONTROL_MODULE_REG + CTRL_STS));;
    osclk_freq = (osclk_freq & 0x00C00000)>>22;
    /* Reference GetInputClockFrequency (GEL files) */
    if(osclk_freq == 0)
    clkin = 96;
    else if(osclk_freq == 1)
    clkin = 24;
    else if(osclk_freq == 2)
    clkin = 25;
    else if(osclk_freq == 3)
    clkin = 26;
    return (clkin*divider);
    }
  • The latest industry SDK for AM437x is: SYSBIOSSDK-IND-SITARA  02_01_01_02
    downloads.ti.com/.../index_FDS.html

    Under sysbios_ind_sdk_2.1.1.2\sdk\os_drivers\source, there is osdrv_utils.c file but doesn't contain such function to get ARM frequency. A similar function is implemented at \sysbios_ind_sdk_2.1.1.2\sdk\board\source\board_support.c

    int Board_getArmClockRate()
    {
        //Return ARM frequency
        uint32_t clkin, dpllMult, dpllDiv;
    #ifdef AM43XX_FAMILY_BUILD
        uint32_t clksel = *((uint32_t*) (SOC_CM_WKUP_REG + PRCM_CM_CLKSEL_DPLL_MPU));
        uint32_t ctrlStats = CTRL_STS;
    #elif defined (AM335X_FAMILY_BUILD)
        uint32_t clksel = *((uint32_t*) (SOC_CM_WKUP_REGS + CM_WKUP_CM_CLKSEL_DPLL_MPU));
        uint32_t ctrlStats = CONTROL_STATUS;
    #endif
        dpllMult = (clksel >> 8 ) & 0x3FF;
        dpllDiv = clksel & 0x7f;
        uint32_t controlMod = CHIPDBBaseAddress(CHIPDB_MOD_ID_CONTROL_MODULE, 0u);
     unsigned osclk_freq = *((uint32_t*)(controlMod + ctrlStats));;
     osclk_freq = (osclk_freq & 0x00C00000)>>22;
     /* Reference GetInputClockFrequency (GEL files) */
     if(osclk_freq == 0)
    #ifdef AM43XX_FAMILY_BUILD
      clkin = 96;
    #elif defined (AM335X_FAMILY_BUILD)
      clkin = 19;
    #endif
     else if(osclk_freq == 1)
      clkin = 24;
     else if(osclk_freq == 2)
      clkin = 25;
     else if(osclk_freq == 3)
      clkin = 26;
        return ((dpllMult/(dpllDiv + 1)) * clkin);

    }

    The source code you referred to:
    divider = (divider >> 8 ) & 0x3FF;
    ....
    return (clkin*divider);

    It messed up what multiplier is and what divider is, and it used the wrong formula.

    Regards, Eric

  • correct ^_^
    thanks