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C6657 direct SPI (no I2C/IBL) booting problem.



Hi,

I’m trying to boot directly from SPI NOR FLASH (without using the I2C) using the MAD tool on the C6657 EVM, but it’s not working for me.

 

I am using these commands:

 

set CYGWIN=nodosfilewarning

set path=%path%;C:\Program Files\Texas Instruments\C6000 Code Generation Tools 7.4.1\bin;c:\cygwin\bin;C:\Python27

 

python map-tool\maptool.py map-tool\config-files\maptoolCfg_C6657_2_cores.json bypass-prelink

 

echo ** Create BTBL (Bootable file) **

mad2hex.exe c6657-le.bin c6657-le.btbl

 

echo ** Create SPI file (Convert boot table into multiple blocks) **

b2i2c c6657-le.btbl c6657-le.btbl.spi

 

echo ** Create CCS file (Convert into CCS dat file format plus a header for SPI) **

b2ccs c6657-le.btbl.spi c6657-le.spi.ccs

 

echo ** Create SPI CCS file (Merge SPI boot parameters and boot tables) **

romparse nysh.spi.map

 

echo ** Create LE CCS ASCII dat file (Swap bytes for Little Endian) **

byteswapccs SerialRom.ccs spirom_le_swap.dat

 

echo ** Create LE CCS binary file (Swap bytes for Little Endian) **

ccs2bin -swap SerialRom.ccs spirom_le.swap.bin

 

The .json deployment file:

 

{

                "deviceName" : "C6657",

               

                "partitions" : [

                                {

                                                "name"                                                : "load-partition",

                                                "vaddr"                                                : "0x9E000000",

                                                "size"                                                    : "0x2000000",

                                                "loadPartition" : true

                                }

                ],

               

                "applications" : [

                                {

                                                "name"                : "core0",

                                                "fileName"         : " core0.out",

                                                "allowedCores"   : [0,1]

                                },

                                {

                                                "name"                : "core1",

                                                "fileName"         : " core1.out",

                                                "allowedCores"   : [0,1]

                                }

                ],

               

                "appDeployment" : [

                                "core0",

                                "core1"

                               

                ]

}

 

The .json maptoolCfg file:

 

{

                "deploymentCfgFile"     : "map-tool\\config-files\\deployment_C6657_2_cores.json",

                "LoadImageName"                         : "c6657-le.bin",

                "prelinkExe"                       : "prelink6x",

                "stripExe"                            : "strip6x",

                "ofdTool"                            : "ofd6x.exe",

                "malApp"                            : "mad-loader\\mal\\malApp\\build\\mal_app.exe",

                "nmlLoader"                      : "mad-loader\\nmlLoader\\build\\nml.exe"

}

 

And the “nysh.spi.map” file is:

 

section {

boot_mode = 50

param_index = 0

options = 1

core_freq_mhz = 1000

exe_file = "c6657-le.spi.ccs"

sw_pll_prediv = 5

sw_pll_mult = 32

sw_pll_postdiv = 2

sw_pll_flags = 1

addr_width = 24

n_pins = 4

csel = 0

mode = 0

c2t_delay = 0

bus_freq_mhz = 5

bus_freq_khz = 0

}

 

The entire process passes successfully, and I’m burning the .bin file into the FLASH using the nor writer, but there no booting.

 

What I’m doing wrong?

 

Thanks!

 

 

  • Hi Yatsir,

    Have you booted SPI boot(direct) succesfully on C6657? Please follow below thread for spi direct boot without IBL.

    Thank you.

  • Rajasekaran,

    Thank you for the fast response.

    I’m familiar with this booting process, and when I burned the “spirom_le_swap.dat” to the flash the booting passed successfully.

    But when I’m running the “spiboot.bat” you provide (because I want to know the process on how to generate this .dat file), and use the generated  “spirom_le_swap.dat” the booting is not working.

    The difference between the “spirom_le_swap.dat”  that exist in the folder to the generated  one is the 0x51 instead of 0x00 in line 9.

     

     “spirom_le_swap.dat”:

    1651 1 10000 1 37b

    0x00005000

    0x00003200

    0x02002040

    0x18000100

    0x00000400

    0x00000000

    0x0a00e803

    0x51000000

    0x00000004

    0x00000000

    Please advise.

    Thanks,

    Yatsir

  • The hex 51 represents i2c address, please update it with 00. Please refer the Note on the KeystoneI_bootloader_workshop\KeystoneI_bootloader_workshop\docs attached document.

    0827.KeystoneI_bootloader_workshop.zip

    Thank you.

  • Hi,

    Do you have an example but using the MAD tool (for 2 cores)?

    Because when I doing the same procedure but with the MAD tool it's doesn't  work.

    (replacing the 'Hex6x' line with:

    python map-tool\maptool.py map-tool\config-files\maptoolCfg_C6657_2_cores.json bypass-prelink

    mad2hex.exe c6657-le.bin c6657-le.btbl)

     

    Thanks.

  • Hi Yatsir,
    I do not have an example using MAD tool.
  • Hi Rajasekaran,

    The C6657 has 2 cores, but the example is doing direct SPI booting for only 1 core.

    1. Is there a way to both the 2 cores directly from the SPI Flash?
    (in the past I booted the 8 cores of the C6678 directly from SPI using the 'Mad' and 'Mad2hex' utilities, but the same procedure is not working for me with the C6657).
    2. Can you refer me to guidance/utility for booting the 2 cores directly from SPI?
    3. Why the booting procedure of TI’s DSP is always involve so much frustrations (why can’t TI provide decent utility, without long batch files, without changing manually the generated file, and without the need to recompile each utility to change buffers sizes)?


    Regards,
    Yatsir
  • Yatsir,
    I would also request you to take a look at the multi-core boot example given in MCSDK under the directory path mcsdk_2_01_02_06\tools\boot_loader\examples\srio\srioboot_helloworld/src. This example shows how you can wake up secondary cores using IPC interrupts and populate the magic address for the cores to start executing code. This structure is useful, if you want to create a single application that boots on all cores and then has control code to parititon itself across secondary cores by checking the core number on which is running.

    Thank you.